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Commit bd2335bb authored by Bao D. Nguyen's avatar Bao D. Nguyen
Browse files

ARM: dts: msm: Add SDC2 device support for Kona platforms



Add the SDC2 device settings to include support for the SD card
for the Kona platforms.

Change-Id: I74c06765e46b0b76f7b4770a47ceb114b92867df
Signed-off-by: default avatarBao D. Nguyen <nguyenb@codeaurora.org>
parent 4f50c26c
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+157 −0
Original line number Diff line number Diff line
@@ -238,6 +238,163 @@
			};
		};

		storage_cd: storage_cd {
			mux {
				pins = "gpio77";
				function = "gpio";
			};

			config {
				pins = "gpio77";
				bias-pull-up;           /* pull up */
				drive-strength = <2>;   /* 2 MA */
			};
		};

		sdc2_clk_on: sdc2_clk_on {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_clk_off: sdc2_clk_off {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_clk_ds_400KHz: sdc2_clk_ds_400KHz {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_clk_ds_50MHz: sdc2_clk_ds_50MHz {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_clk_ds_100MHz: sdc2_clk_ds_100MHz {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_clk_ds_200MHz: sdc2_clk_ds_200MHz {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_cmd_on: sdc2_cmd_on {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_cmd_off: sdc2_cmd_off {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_cmd_ds_400KHz: sdc2_cmd_ds_400KHz {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_cmd_ds_50MHz: sdc2_cmd_ds_50MHz {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_cmd_ds_100MHz: sdc2_cmd_ds_100MHz {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_cmd_ds_200MHz: sdc2_cmd_ds_200MHz {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_data_on: sdc2_data_on {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_data_off: sdc2_data_off {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_data_ds_400KHz: sdc2_data_ds_400KHz {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_data_ds_50MHz: sdc2_data_ds_50MHz {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_data_ds_100MHz: sdc2_data_ds_100MHz {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_data_ds_200MHz: sdc2_data_ds_200MHz {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		ap2mdm {
			ap2mdm_active: ap2mdm_active {
				mux {
+19 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@
/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 */

#include <dt-bindings/gpio/gpio.h>
#include "kona-pmic-overlay.dtsi"
#include "msm-audio-lpass.dtsi"

@@ -140,3 +140,21 @@
		};
	};
};

&sdhc_2 {
	vdd-supply = <&pm8150a_l9>;
	qcom,vdd-voltage-level = <2950000 2960000>;
	qcom,vdd-current-level = <200 800000>;

	vdd-io-supply = <&pm8150a_l6>;
	qcom,vdd-io-voltage-level = <1808000 2960000>;
	qcom,vdd-io-current-level = <200 22000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &storage_cd>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>;

	cd-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;

	status = "disabled";
};
+63 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@

	aliases {
		ufshc1 = &ufshc_mem; /* Embedded UFS slot */
		sdhc2 = &sdhc_2; /* SDC2 SD card slot */
		pci-domain2 = &pcie2; /* PCIe2 domain */
		serial0 = &qupv3_se2_2uart; /* RUMI */
	};
@@ -1229,6 +1230,68 @@
		status = "disabled";
	};

	sdhc_2: sdhci@8804000 {
		compatible = "qcom,sdhci-msm-v5";
		reg = <0x8804000 0x1000>;
		reg-names = "hc_mem";

		interrupts = <0 204 0>, <0 222 0>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <4>;
		qcom,large-address-bus;

		qcom,msm-bus,name = "sdhc2";
		qcom,msm-bus,num-cases = <8>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
			/* No vote */
			<81 512 0 0>, <1 608 0 0>,
			/* 400 KB/s*/
			<81 512 1046 1600>,
			<1 608 1600 1600>,
			/* 20 MB/s */
			<81 512 52286 80000>,
			<1 608 80000 80000>,
			/* 25 MB/s */
			<81 512 65360 100000>,
			<1 608 100000 100000>,
			/* 50 MB/s */
			<81 512 130718 200000>,
			<1 608 133320 133320>,
			/* 100 MB/s */
			<81 512 261438 200000>,
			<1 608 150000 150000>,
			/* 200 MB/s */
			<81 512 261438 400000>,
			<1 608 300000 300000>,
			/* Max. bandwidth */
			<81 512 1338562 4096000>,
			<1 608 1338562 4096000>;
		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
			100750000 200000000 4294967295>;

		qcom,restore-after-cx-collapse;

		qcom,clk-rates = <400000 20000000 25000000
					50000000 100000000 201500000>;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
				      "SDR104";

		qcom,devfreq,freq-table = <50000000 201500000>;
		clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>,
			<&clock_gcc GCC_SDCC2_APPS_CLK>;
		clock-names = "iface_clk", "core_clk";

		/* PM QoS */
		qcom,pm-qos-irq-type = "affine_irq";
		qcom,pm-qos-irq-latency = <44 44>;
		qcom,pm-qos-cpu-groups = <0x3f 0xc0>;
		qcom,pm-qos-legacy-latency-us = <44 44>, <44 44>;

		status = "disabled";
	};

	ipcc_mproc: qcom,ipcc@408000 {
		compatible = "qcom,kona-ipcc";
		reg = <0x408000 0x1000>;