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Commit bc48740b authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'cxgb4-rdma'



Raju Rangoju says:

====================
Add support for RDMA enhancements in cxgb4

Allocates the HW-resources and provide the necessary routines for the
upper layer driver (rdma/iw_cxgb4) to enable the RDMA SRQ support for
Chelsio adapters.

Advertise support for write with immediate work request
Advertise support for write with completion

v3: modified memory allocation as per Stefano's suggestion

v2: fixed the patching issues and also
    fixed the following based on review comments of Stefano Brivio
 - using kvzalloc instead of vzalloc
 - using #define instead of enum
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 0dfebaf1 f3910c62
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+1 −1
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@
obj-$(CONFIG_CHELSIO_T4) += cxgb4.o

cxgb4-objs := cxgb4_main.o l2t.o smt.o t4_hw.o sge.o clip_tbl.o cxgb4_ethtool.o \
	      cxgb4_uld.o sched.o cxgb4_filter.o cxgb4_tc_u32.o \
	      cxgb4_uld.o srq.o sched.o cxgb4_filter.o cxgb4_tc_u32.o \
	      cxgb4_ptp.o cxgb4_tc_flower.o cxgb4_cudbg.o \
	      cudbg_common.o cudbg_lib.o cudbg_zlib.o
cxgb4-$(CONFIG_CHELSIO_T4_DCB) +=  cxgb4_dcb.o
+4 −0
Original line number Diff line number Diff line
@@ -390,6 +390,8 @@ struct adapter_params {
	 * used by the Port
	 */
	u8 mps_bg_map[MAX_NPORTS];	/* MPS Buffer Group Map */
	bool write_w_imm_support;       /* FW supports WRITE_WITH_IMMEDIATE */
	bool write_cmpl_support;        /* FW supports WRITE_CMPL */
};

/* State needed to monitor the forward progress of SGE Ingress DMA activities
@@ -960,6 +962,8 @@ struct adapter {

	/* HMA */
	struct hma_data hma;

	struct srq_data *srq;
};

/* Support for "sched-class" command to allow a TX Scheduling Class to be
+32 −0
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@
#include "t4fw_api.h"
#include "t4fw_version.h"
#include "cxgb4_dcb.h"
#include "srq.h"
#include "cxgb4_debugfs.h"
#include "clip_tbl.h"
#include "l2t.h"
@@ -586,6 +587,10 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp,
		const struct cpl_abort_rpl_rss *p = (void *)rsp;

		hash_del_filter_rpl(q->adap, p);
	} else if (opcode == CPL_SRQ_TABLE_RPL) {
		const struct cpl_srq_table_rpl *p = (void *)rsp;

		do_srq_table_rpl(q->adap, p);
	} else
		dev_err(q->adap->pdev_dev,
			"unexpected CPL %#x on FW event queue\n", opcode);
@@ -4467,6 +4472,20 @@ static int adap_init0(struct adapter *adap)
		adap->vres.pbl.start = val[4];
		adap->vres.pbl.size = val[5] - val[4] + 1;

		params[0] = FW_PARAM_PFVF(SRQ_START);
		params[1] = FW_PARAM_PFVF(SRQ_END);
		ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
				      params, val);
		if (!ret) {
			adap->vres.srq.start = val[0];
			adap->vres.srq.size = val[1] - val[0] + 1;
		}
		if (adap->vres.srq.size) {
			adap->srq = t4_init_srq(adap->vres.srq.size);
			if (!adap->srq)
				dev_warn(&adap->pdev->dev, "could not allocate SRQ, continuing\n");
		}

		params[0] = FW_PARAM_PFVF(SQRQ_START);
		params[1] = FW_PARAM_PFVF(SQRQ_END);
		params[2] = FW_PARAM_PFVF(CQ_START);
@@ -4500,6 +4519,18 @@ static int adap_init0(struct adapter *adap)
			 "max_ordird_qp %d max_ird_adapter %d\n",
			 adap->params.max_ordird_qp,
			 adap->params.max_ird_adapter);

		/* Enable write_with_immediate if FW supports it */
		params[0] = FW_PARAM_DEV(RDMA_WRITE_WITH_IMM);
		ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, params,
				      val);
		adap->params.write_w_imm_support = (ret == 0 && val[0] != 0);

		/* Enable write_cmpl if FW supports it */
		params[0] = FW_PARAM_DEV(RI_WRITE_CMPL_WR);
		ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, params,
				      val);
		adap->params.write_cmpl_support = (ret == 0 && val[0] != 0);
		adap->num_ofld_uld += 2;
	}
	if (caps_cmd.iscsicaps) {
@@ -5135,6 +5166,7 @@ static void free_some_resources(struct adapter *adapter)

	kvfree(adapter->smt);
	kvfree(adapter->l2t);
	kvfree(adapter->srq);
	t4_cleanup_sched(adapter);
	kvfree(adapter->tids.tid_tab);
	cxgb4_cleanup_tc_flower(adapter);
+2 −0
Original line number Diff line number Diff line
@@ -666,6 +666,8 @@ static void uld_init(struct adapter *adap, struct cxgb4_lld_info *lld)
	lld->ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl;
	lld->nodeid = dev_to_node(adap->pdev_dev);
	lld->fr_nsmr_tpte_wr_support = adap->params.fr_nsmr_tpte_wr_support;
	lld->write_w_imm_support = adap->params.write_w_imm_support;
	lld->write_cmpl_support = adap->params.write_cmpl_support;
}

static void uld_attach(struct adapter *adap, unsigned int uld)
+3 −0
Original line number Diff line number Diff line
@@ -284,6 +284,7 @@ struct cxgb4_virt_res { /* virtualized HW resources */
	struct cxgb4_range iscsi;
	struct cxgb4_range stag;
	struct cxgb4_range rq;
	struct cxgb4_range srq;
	struct cxgb4_range pbl;
	struct cxgb4_range qp;
	struct cxgb4_range cq;
@@ -353,6 +354,8 @@ struct cxgb4_lld_info {
	void **iscsi_ppm;		     /* iscsi page pod manager */
	int nodeid;			     /* device numa node id */
	bool fr_nsmr_tpte_wr_support;	     /* FW supports FR_NSMR_TPTE_WR */
	bool write_w_imm_support;         /* FW supports WRITE_WITH_IMMEDIATE */
	bool write_cmpl_support;             /* FW supports WRITE_CMPL WR */
};

struct cxgb4_uld_info {
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