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Commit bbfdbeac authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "mhi: core: remove support for bandwidth request from mhi_cb"

parents 9156ccdd 314bb3df

drivers/bus/mhi/controllers/mhi_arch_qcom.c

+30 −86
Original line number Diff line number Diff line
@@ -41,8 +41,6 @@ struct arch_info { 
	void *boot_ipc_log;

	void *tsync_ipc_log;

	struct mhi_device *boot_dev;

	struct mhi_link_info current_link_info;

	struct work_struct bw_scale_work;

	struct notifier_block pm_notifier;

	struct completion pm_completion;

};
@@ -328,7 +326,7 @@ static int mhi_arch_pcie_scale_bw(struct mhi_controller *mhi_cntrl, 
				   struct pci_dev *pci_dev,

				   struct mhi_link_info *link_info)

{

	int ret, scale;

	int ret;



	mhi_cntrl->lpm_disable(mhi_cntrl, mhi_cntrl->priv_data);

	ret = msm_pcie_set_link_bandwidth(pci_dev, link_info->target_link_speed,
@@ -338,60 +336,22 @@ static int mhi_arch_pcie_scale_bw(struct mhi_controller *mhi_cntrl, 
	if (ret)

		return ret;



	/* if we switch to low bw release bus scale voting */

	scale = !(link_info->target_link_speed == PCI_EXP_LNKSTA_CLS_2_5GB);

	mhi_arch_set_bus_request(mhi_cntrl, scale);

	/* do a bus scale vote based on gen speeds */

	mhi_arch_set_bus_request(mhi_cntrl, link_info->target_link_speed);



	MHI_VERB("bw changed to speed:0x%x width:0x%x bus_scale:%d\n",

		 link_info->target_link_speed, link_info->target_link_width,

		 scale);

	MHI_VERB("bw changed to speed:0x%x width:0x%x\n",

		 link_info->target_link_speed, link_info->target_link_width);



	return 0;

}



static void mhi_arch_pcie_bw_scale_work(struct work_struct *work)

static int mhi_arch_bw_scale(struct mhi_controller *mhi_cntrl,

			     struct mhi_link_info *link_info)

{

	struct arch_info *arch_info = container_of(work,

						   struct arch_info,

						   bw_scale_work);

	struct mhi_dev *mhi_dev = arch_info->mhi_dev;

	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);

	struct pci_dev *pci_dev = mhi_dev->pci_dev;

	struct device *dev = &pci_dev->dev;

	struct mhi_controller *mhi_cntrl = dev_get_drvdata(dev);

	struct mhi_link_info mhi_link_info;

	struct mhi_link_info *cur_info = &arch_info->current_link_info;

	int ret;



	mutex_lock(&mhi_cntrl->pm_mutex);

	if (!mhi_dev->powered_on || MHI_IS_SUSPENDED(mhi_dev->suspend_mode))

		goto exit_work;



	/* copy the latest speed change */

	write_lock_irq(&mhi_cntrl->pm_lock);

	mhi_link_info = mhi_cntrl->mhi_link_info;

	write_unlock_irq(&mhi_cntrl->pm_lock);



	/* link is already set to current settings */

	if (cur_info->target_link_speed == mhi_link_info.target_link_speed &&

	    cur_info->target_link_width == mhi_link_info.target_link_width)

		goto exit_work;



	ret = mhi_arch_pcie_scale_bw(mhi_cntrl, pci_dev, &mhi_link_info);

	if (ret)

		goto exit_work;



	*cur_info = mhi_link_info;



exit_work:

	mutex_unlock(&mhi_cntrl->pm_mutex);

}



static void mhi_arch_pcie_bw_scale_cb(struct mhi_controller *mhi_cntrl,

				      struct mhi_dev *mhi_dev)

{

	struct arch_info *arch_info = mhi_dev->arch_info;



	schedule_work(&arch_info->bw_scale_work);

	return mhi_arch_pcie_scale_bw(mhi_cntrl, pci_dev, link_info);

}



static int mhi_bl_probe(struct mhi_device *mhi_device,
@@ -436,13 +396,13 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) 
{

	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);

	struct arch_info *arch_info = mhi_dev->arch_info;

	struct mhi_link_info *cur_link_info;

	char node[32];

	int ret;

	u16 linkstat;



	if (!arch_info) {

		struct msm_pcie_register_event *reg_event;

		struct mhi_link_info *cur_link_info;



		arch_info = devm_kzalloc(&mhi_dev->pci_dev->dev,

					 sizeof(*arch_info), GFP_KERNEL);
@@ -534,9 +494,10 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) 
				    mhi_dev->pci_dev, NULL, 0);

		mhi_dev->pci_dev->no_d3hot = true;



		INIT_WORK(&arch_info->bw_scale_work,

			  mhi_arch_pcie_bw_scale_work);

		mhi_dev->bw_scale = mhi_arch_pcie_bw_scale_cb;

		mhi_cntrl->bw_scale = mhi_arch_bw_scale;



		mhi_driver_register(&mhi_bl_driver);

	}



	/* store the current bw info */

	ret = pcie_capability_read_word(mhi_dev->pci_dev,
@@ -544,18 +505,13 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) 
	if (ret)

		return ret;



		cur_link_info = &arch_info->current_link_info;

		cur_link_info->target_link_speed =

			linkstat & PCI_EXP_LNKSTA_CLS;

		cur_link_info->target_link_width =

			(linkstat & PCI_EXP_LNKSTA_NLW) >>

	cur_link_info = &mhi_cntrl->mhi_link_info;

	cur_link_info->target_link_speed = linkstat & PCI_EXP_LNKSTA_CLS;

	cur_link_info->target_link_width = (linkstat & PCI_EXP_LNKSTA_NLW) >>

					    PCI_EXP_LNKSTA_NLW_SHIFT;

		mhi_cntrl->mhi_link_info = *cur_link_info;



		mhi_driver_register(&mhi_bl_driver);

	}



	return mhi_arch_set_bus_request(mhi_cntrl, 1);

	return mhi_arch_set_bus_request(mhi_cntrl,

					cur_link_info->target_link_speed);

}



void mhi_arch_pcie_deinit(struct mhi_controller *mhi_cntrl)
@@ -743,17 +699,16 @@ static int __mhi_arch_link_resume(struct mhi_controller *mhi_cntrl) 
	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);

	struct arch_info *arch_info = mhi_dev->arch_info;

	struct pci_dev *pci_dev = mhi_dev->pci_dev;

	struct mhi_link_info *cur_info = &arch_info->current_link_info;

	struct mhi_link_info *cur_info = &mhi_cntrl->mhi_link_info;

	int ret;



	MHI_LOG("Entered\n");



	/* request bus scale voting if we're on Gen 2 or higher speed */

	if (cur_info->target_link_speed != PCI_EXP_LNKSTA_CLS_2_5GB) {

		ret = mhi_arch_set_bus_request(mhi_cntrl, 1);

	/* request bus scale voting based on higher gen speed */

	ret = mhi_arch_set_bus_request(mhi_cntrl,

				       cur_info->target_link_speed);

	if (ret)

		MHI_LOG("Could not set bus frequency, ret:%d\n", ret);

	}



	ret = msm_pcie_pm_control(MSM_PCIE_RESUME, mhi_cntrl->bus, pci_dev,

				  NULL, 0);
@@ -787,10 +742,7 @@ static int __mhi_arch_link_resume(struct mhi_controller *mhi_cntrl) 
int mhi_arch_link_resume(struct mhi_controller *mhi_cntrl)

{

	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);

	struct arch_info *arch_info = mhi_dev->arch_info;

	struct pci_dev *pci_dev = mhi_dev->pci_dev;

	struct mhi_link_info *cur_info = &arch_info->current_link_info;

	struct mhi_link_info *updated_info = &mhi_cntrl->mhi_link_info;

	int ret = 0;



	MHI_LOG("Entered\n");
@@ -810,14 +762,6 @@ int mhi_arch_link_resume(struct mhi_controller *mhi_cntrl) 
		return ret;

	}



	/* BW request from device doesn't match current link speed */

	if (cur_info->target_link_speed != updated_info->target_link_speed ||

	    cur_info->target_link_width != updated_info->target_link_width) {

		ret = mhi_arch_pcie_scale_bw(mhi_cntrl, pci_dev, updated_info);

		if (!ret)

			*cur_info = *updated_info;

	}



	msm_pcie_l1ss_timeout_enable(pci_dev);



	MHI_LOG("Exited\n");

drivers/bus/mhi/controllers/mhi_qcom.c

+0 −4
Original line number Diff line number Diff line
@@ -594,10 +594,6 @@ static void mhi_status_cb(struct mhi_controller *mhi_cntrl, 
		pm_runtime_mark_last_busy(dev);

		pm_request_autosuspend(dev);

		break;

	case MHI_CB_BW_REQ:

		if (mhi_dev->bw_scale)

			mhi_dev->bw_scale(mhi_cntrl, mhi_dev);

		break;

	case MHI_CB_EE_MISSION_MODE:

		/*

		 * we need to force a suspend so device can switch to

drivers/bus/mhi/controllers/mhi_qcom.h

+0 −3
Original line number Diff line number Diff line
@@ -57,9 +57,6 @@ struct mhi_dev { 
	dma_addr_t iova_stop;

	enum mhi_suspend_mode suspend_mode;



	/* if set, soc support dynamic bw scaling */

	void (*bw_scale)(struct mhi_controller *mhi_cntrl,

			 struct mhi_dev *mhi_dev);

	unsigned int lpm_disable_depth;

	/* lock to toggle low power modes */

	spinlock_t lpm_lock;

include/linux/mhi.h

+0 −2
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ struct mhi_buf_info; 
 * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode ee

 * @MHI_CB_SYS_ERROR: MHI device enter error state (may recover)

 * @MHI_CB_FATAL_ERROR: MHI device entered fatal error

 * @MHI_CB_BW_REQ: Received a bandwidth switch request from device

 */

enum MHI_CB {

	MHI_CB_IDLE,
@@ -44,7 +43,6 @@ enum MHI_CB { 
	MHI_CB_EE_MISSION_MODE,

	MHI_CB_SYS_ERROR,

	MHI_CB_FATAL_ERROR,

	MHI_CB_BW_REQ,

};



/**