drm/msm/sde: update cached rot fetch with h/w write

Currently, cached rot fetch value is updated even if h/w
write is bypassed during continuous splash. This will
leave the h/w out of sync with the cached value. Update
cached rot fetch value only if h/w update is applied.

Change-Id: I56af66acd7185f620464e76303ca6442a5c95f4b
Signed-off-by: Alan Kwong <akwong@codeaurora.org>