Merge "msm: dts: primary MI2S interface" (b7c05b2d) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/arm64/boot/dts/qcom/sa6155-audio.dtsi

+11 −2

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2018, The Linux Foundation. All rights reserved.
		* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -10,6 +10,7 @@
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*/
		#include "sm6150-lpi.dtsi"

		&soc {
		qcom,msm-dai-tdm-pri-rx {
		@@ -254,7 +255,7 @@
		qcom,msm-cpudai-tdm-group-id = <37168>;
		qcom,msm-cpudai-tdm-group-num-ports = <4>;
		qcom,msm-cpudai-tdm-group-port-id = <36912 36914 36916 36918>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		qcom,msm-cpudai-tdm-clk-rate = <24576000>;
		qcom,msm-cpudai-tdm-clk-internal = <1>;
		qcom,msm-cpudai-tdm-sync-mode = <1>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		@@ -396,6 +397,14 @@
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		dai_pri_auxpcm: qcom,msm-pri-auxpcm {
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&pri_aux_pcm_sck_active &pri_aux_pcm_ws_active
		&pri_aux_pcm_data0_active &pri_aux_pcm_data1_active>;
		pinctrl-1 = <&pri_aux_pcm_sck_sleep &pri_aux_pcm_ws_sleep
		&pri_aux_pcm_data0_sleep &pri_aux_pcm_data1_sleep>;
		};
		};

		&audio_apr {

arch/arm64/boot/dts/qcom/sm6150-pinctrl.dtsi

+110 −0

Original line number	Diff line number	Diff line
		@@ -1197,6 +1197,114 @@
		};
		};

		pri_aux_pcm_sck {
		pri_aux_pcm_sck_sleep: pri_aux_pcm_sck_sleep {
		mux {
		pins = "gpio108";
		function = "mi2s_1";
		};

		config {
		pins = "gpio108";
		drive-strength = <2>; /* 2 mA */
		};
		};

		pri_aux_pcm_sck_active: pri_aux_pcm_sck_active {
		mux {
		pins = "gpio108";
		function = "mi2s_1";
		};

		config {
		pins = "gpio108";
		drive-strength = <8>; /* 8 mA */
		input-enable;
		};
		};
		};

		pri_aux_pcm_ws {
		pri_aux_pcm_ws_sleep: pri_aux_pcm_ws_sleep {
		mux {
		pins = "gpio109";
		function = "mi2s_1";
		};

		config {
		pins = "gpio109";
		drive-strength = <2>; /* 2 mA */
		};
		};

		pri_aux_pcm_ws_active: pri_aux_pcm_ws_active {
		mux {
		pins = "gpio109";
		function = "mi2s_1";
		};

		config {
		pins = "gpio109";
		drive-strength = <8>; /* 8 mA */
		input-enable;
		};
		};
		};

		pri_aux_pcm_data0 {
		pri_aux_pcm_data0_sleep: pri_aux_pcm_data0_sleep {
		mux {
		pins = "gpio110";
		function = "mi2s_1";
		};

		config {
		pins = "gpio110";
		drive-strength = <2>; /* 2 mA */
		};
		};

		pri_aux_pcm_data0_active: pri_aux_pcm_data0_active {
		mux {
		pins = "gpio110";
		function = "mi2s_1";
		};

		config {
		pins = "gpio110";
		drive-strength = <8>; /* 8 mA */
		input-enable;
		};
		};
		};

		pri_aux_pcm_data1 {
		pri_aux_pcm_data1_sleep: pri_aux_pcm_data1_sleep {
		mux {
		pins = "gpio111";
		function = "mi2s_1";
		};

		config {
		pins = "gpio111";
		drive-strength = <2>; /* 2 mA */
		};
		};

		pri_aux_pcm_data1_active: pri_aux_pcm_data1_active {
		mux {
		pins = "gpio111";
		function = "mi2s_1";
		};

		config {
		pins = "gpio111";
		drive-strength = <8>; /* 8 mA */
		output-high;
		};
		};
		};

		pmx_ts_int_active {
		ts_int_active: ts_int_active {
		mux {
		@@ -1781,6 +1889,7 @@
		};
		};


		&pm6150_gpios {
		wcd934x_mclk {
		wcd934x_mclk_default: wcd934x_mclk_default{
		@@ -1826,3 +1935,4 @@

		};
		};