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Commit b6b5d049 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Add pipe B force quirk for 830M 



830M has problems when some of the pipes are disabled. Namely if a
plane, DVO port etc. is currently assigned to a disabled pipe, it
can't moved to the other pipe until the current pipe is also enabled.
To keep things simple just leave both pipes running all the time.

Ideally I think should turn the pipes off if neither is active, and
when either becomes active we enable both. But that would reuquire
proper atomic modeset support, and probably a bit of extra care in
the order things get enabled.

v2: Reorder wrt. double wide handling changes

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: default avatarThomas Richter <richter@rus.uni-stuttgart.de>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5f080c0f

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -709,6 +709,7 @@ enum intel_sbi_destination { 
#define QUIRK_LVDS_SSC_DISABLE (1<<1)

#define QUIRK_LVDS_SSC_DISABLE (1<<1)

#define QUIRK_INVERT_BRIGHTNESS (1<<2)

#define QUIRK_INVERT_BRIGHTNESS (1<<2)

#define QUIRK_BACKLIGHT_PRESENT (1<<3)

#define QUIRK_BACKLIGHT_PRESENT (1<<3)

#define QUIRK_PIPEB_FORCE (1<<4)





struct intel_fbdev;

struct intel_fbdev;

struct intel_fbc_work;

struct intel_fbc_work;

drivers/gpu/drm/i915/intel_display.c

+27 −12
Original line number Original line Diff line number Diff line
@@ -1261,8 +1261,9 @@ void assert_pipe(struct drm_i915_private *dev_priv, 
	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,

	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,

								      pipe);

								      pipe);





	/* if we need the pipe A quirk it must be always on */

	/* if we need the pipe quirk it must be always on */

	if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)

	if ((pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) ||

	    (pipe == PIPE_B && dev_priv->quirks & QUIRK_PIPEB_FORCE))

		state = true;

		state = true;





	if (!intel_display_power_enabled(dev_priv,

	if (!intel_display_power_enabled(dev_priv,
@@ -1662,8 +1663,9 @@ static void i9xx_enable_pll(struct intel_crtc *crtc) 
 */

 */

static void i9xx_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)

static void i9xx_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)

{

{

	/* Don't disable pipe A or pipe A PLLs if needed */

	/* Don't disable pipe or pipe PLLs if needed */

	if (pipe == PIPE_A && (dev_priv->quirks & QUIRK_PIPEA_FORCE))

	if ((pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) ||

	    (pipe == PIPE_B && dev_priv->quirks & QUIRK_PIPEB_FORCE))

		return;

		return;





	/* Make sure the pipe isn't still relying on us */

	/* Make sure the pipe isn't still relying on us */
@@ -2031,8 +2033,8 @@ static void intel_enable_pipe(struct intel_crtc *crtc) 
	reg = PIPECONF(cpu_transcoder);

	reg = PIPECONF(cpu_transcoder);

	val = I915_READ(reg);

	val = I915_READ(reg);

	if (val & PIPECONF_ENABLE) {

	if (val & PIPECONF_ENABLE) {

		WARN_ON(!(pipe == PIPE_A &&

		WARN_ON(!((pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) ||

			  dev_priv->quirks & QUIRK_PIPEA_FORCE));

			  (pipe == PIPE_B && dev_priv->quirks & QUIRK_PIPEB_FORCE)));

		return;

		return;

	}

	}
@@ -2079,7 +2081,8 @@ static void intel_disable_pipe(struct intel_crtc *crtc) 
		val &= ~PIPECONF_DOUBLE_WIDE;

		val &= ~PIPECONF_DOUBLE_WIDE;





	/* Don't disable pipe or pipe PLLs if needed */

	/* Don't disable pipe or pipe PLLs if needed */

	if (!(pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE))

	if (!(pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) &&

	    !(pipe == PIPE_B && dev_priv->quirks & QUIRK_PIPEB_FORCE))

		val &= ~PIPECONF_ENABLE;

		val &= ~PIPECONF_ENABLE;





	I915_WRITE(reg, val);

	I915_WRITE(reg, val);
@@ -6039,9 +6042,9 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc) 




	pipeconf = 0;

	pipeconf = 0;





	if (dev_priv->quirks & QUIRK_PIPEA_FORCE &&

	if ((intel_crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) ||

	    I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE)

	    (intel_crtc->pipe == PIPE_B && dev_priv->quirks & QUIRK_PIPEB_FORCE))

		pipeconf |= PIPECONF_ENABLE;

		pipeconf |= I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE;





	if (intel_crtc->config.double_wide)

	if (intel_crtc->config.double_wide)

		pipeconf |= PIPECONF_DOUBLE_WIDE;

		pipeconf |= PIPECONF_DOUBLE_WIDE;
@@ -10754,8 +10757,9 @@ check_crtc_state(struct drm_device *dev) 
		active = dev_priv->display.get_pipe_config(crtc,

		active = dev_priv->display.get_pipe_config(crtc,

							   &pipe_config);

							   &pipe_config);





		/* hw state is inconsistent with the pipe A quirk */

		/* hw state is inconsistent with the pipe quirk */

		if (crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)

		if ((crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) ||

		    (crtc->pipe == PIPE_B && dev_priv->quirks & QUIRK_PIPEB_FORCE))

			active = crtc->active;

			active = crtc->active;





		for_each_intel_encoder(dev, encoder) {

		for_each_intel_encoder(dev, encoder) {
@@ -12565,6 +12569,14 @@ static void quirk_pipea_force(struct drm_device *dev) 
	DRM_INFO("applying pipe a force quirk\n");

	DRM_INFO("applying pipe a force quirk\n");

}

}





static void quirk_pipeb_force(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	dev_priv->quirks |= QUIRK_PIPEB_FORCE;

	DRM_INFO("applying pipe b force quirk\n");

}



/*

/*

 * Some machines (Lenovo U160) do not work with SSC on LVDS for some reason

 * Some machines (Lenovo U160) do not work with SSC on LVDS for some reason

 */

 */
@@ -12642,6 +12654,9 @@ static struct intel_quirk intel_quirks[] = { 
	/* 830 needs to leave pipe A & dpll A up */

	/* 830 needs to leave pipe A & dpll A up */

	{ 0x3577, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },

	{ 0x3577, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },





	/* 830 needs to leave pipe B & dpll B up */

	{ 0x3577, PCI_ANY_ID, PCI_ANY_ID, quirk_pipeb_force },



	/* Lenovo U160 cannot use SSC on LVDS */

	/* Lenovo U160 cannot use SSC on LVDS */

	{ 0x0046, 0x17aa, 0x3920, quirk_ssc_force_disable },

	{ 0x0046, 0x17aa, 0x3920, quirk_ssc_force_disable },