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Commit b5df1b3a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Ingo Molnar:
 "The main changes are the PCID fixes from Andy, but there's also two
  hyperv fixes and two paravirt updates"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/hyper-v: Remove duplicated HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED definition
  x86/hyper-V: Allocate the IDT entry early in boot
  paravirt: Switch maintainer
  x86/paravirt: Remove no longer used paravirt functions
  x86/mm/64: Initialize CR4.PCIDE early
  x86/hibernate/64: Mask off CR3's PCID bits in the saved CR3
  x86/mm: Get rid of VM_BUG_ON in switch_tlb_irqs_off()
parents 9888e4d4 1278f58c

MAINTAINERS

+2 −2
Original line number Diff line number Diff line
@@ -10135,7 +10135,7 @@ F: include/uapi/linux/ppdev.h 
F:	Documentation/parport*.txt



PARAVIRT_OPS INTERFACE

M:	Jeremy Fitzhardinge <jeremy@goop.org>

M:	Juergen Gross <jgross@suse.com>

M:	Chris Wright <chrisw@sous-sol.org>

M:	Alok Kataria <akataria@vmware.com>

M:	Rusty Russell <rusty@rustcorp.com.au>
@@ -10143,7 +10143,7 @@ L: virtualization@lists.linux-foundation.org 
S:	Supported

F:	Documentation/virtual/paravirt_ops.txt

F:	arch/*/kernel/paravirt*

F:	arch/*/include/asm/paravirt.h

F:	arch/*/include/asm/paravirt*.h

F:	include/linux/hypervisor.h



PARIDE DRIVERS FOR PARALLEL PORT IDE DEVICES

arch/x86/include/asm/desc.h

+1 −2
Original line number Diff line number Diff line
@@ -121,7 +121,6 @@ static inline int desc_empty(const void *ptr) 
#define load_ldt(ldt)				asm volatile("lldt %0"::"m" (ldt))



#define store_gdt(dtr)				native_store_gdt(dtr)

#define store_idt(dtr)				native_store_idt(dtr)

#define store_tr(tr)				(tr = native_store_tr())



#define load_TLS(t, cpu)			native_load_tls(t, cpu)
@@ -228,7 +227,7 @@ static inline void native_store_gdt(struct desc_ptr *dtr) 
	asm volatile("sgdt %0":"=m" (*dtr));

}



static inline void native_store_idt(struct desc_ptr *dtr)

static inline void store_idt(struct desc_ptr *dtr)

{

	asm volatile("sidt %0":"=m" (*dtr));

}

arch/x86/include/asm/paravirt.h

+0 −37
Original line number Diff line number Diff line
@@ -71,11 +71,6 @@ static inline void write_cr3(unsigned long x) 
	PVOP_VCALL1(pv_mmu_ops.write_cr3, x);

}



static inline unsigned long __read_cr4(void)

{

	return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);

}



static inline void __write_cr4(unsigned long x)

{

	PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
@@ -228,10 +223,6 @@ static inline void set_ldt(const void *addr, unsigned entries) 
{

	PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);

}

static inline void store_idt(struct desc_ptr *dtr)

{

	PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);

}

static inline unsigned long paravirt_store_tr(void)

{

	return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
@@ -365,12 +356,6 @@ static inline void paravirt_release_p4d(unsigned long pfn) 
	PVOP_VCALL1(pv_mmu_ops.release_p4d, pfn);

}



static inline void pte_update(struct mm_struct *mm, unsigned long addr,

			      pte_t *ptep)

{

	PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);

}



static inline pte_t __pte(pteval_t val)

{

	pteval_t ret;
@@ -472,28 +457,6 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 
		PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);

}



static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,

			      pmd_t *pmdp, pmd_t pmd)

{

	if (sizeof(pmdval_t) > sizeof(long))

		/* 5 arg words */

		pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);

	else

		PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,

			    native_pmd_val(pmd));

}



static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,

			      pud_t *pudp, pud_t pud)

{

	if (sizeof(pudval_t) > sizeof(long))

		/* 5 arg words */

		pv_mmu_ops.set_pud_at(mm, addr, pudp, pud);

	else

		PVOP_VCALL4(pv_mmu_ops.set_pud_at, mm, addr, pudp,

			    native_pud_val(pud));

}



static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)

{

	pmdval_t val = native_pmd_val(pmd);

arch/x86/include/asm/paravirt_types.h

+0 −9
Original line number Diff line number Diff line
@@ -107,7 +107,6 @@ struct pv_cpu_ops { 
	unsigned long (*read_cr0)(void);

	void (*write_cr0)(unsigned long);



	unsigned long (*read_cr4)(void);

	void (*write_cr4)(unsigned long);



#ifdef CONFIG_X86_64
@@ -119,8 +118,6 @@ struct pv_cpu_ops { 
	void (*load_tr_desc)(void);

	void (*load_gdt)(const struct desc_ptr *);

	void (*load_idt)(const struct desc_ptr *);

	/* store_gdt has been removed. */

	void (*store_idt)(struct desc_ptr *);

	void (*set_ldt)(const void *desc, unsigned entries);

	unsigned long (*store_tr)(void);

	void (*load_tls)(struct thread_struct *t, unsigned int cpu);
@@ -245,12 +242,6 @@ struct pv_mmu_ops { 
	void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,

			   pte_t *ptep, pte_t pteval);

	void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);

	void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr,

			   pmd_t *pmdp, pmd_t pmdval);

	void (*set_pud_at)(struct mm_struct *mm, unsigned long addr,

			   pud_t *pudp, pud_t pudval);

	void (*pte_update)(struct mm_struct *mm, unsigned long addr,

			   pte_t *ptep);



	pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,

					pte_t *ptep);

arch/x86/include/asm/pgtable.h

+4 −23
Original line number Diff line number Diff line
@@ -55,8 +55,6 @@ extern pmdval_t early_pmd_flags; 
#else  /* !CONFIG_PARAVIRT */

#define set_pte(ptep, pte)		native_set_pte(ptep, pte)

#define set_pte_at(mm, addr, ptep, pte)	native_set_pte_at(mm, addr, ptep, pte)

#define set_pmd_at(mm, addr, pmdp, pmd)	native_set_pmd_at(mm, addr, pmdp, pmd)

#define set_pud_at(mm, addr, pudp, pud)	native_set_pud_at(mm, addr, pudp, pud)



#define set_pte_atomic(ptep, pte)					\

	native_set_pte_atomic(ptep, pte)
@@ -87,8 +85,6 @@ extern pmdval_t early_pmd_flags; 
#define pte_clear(mm, addr, ptep)	native_pte_clear(mm, addr, ptep)

#define pmd_clear(pmd)			native_pmd_clear(pmd)



#define pte_update(mm, addr, ptep)              do { } while (0)



#define pgd_val(x)	native_pgd_val(x)

#define __pgd(x)	native_make_pgd(x)
@@ -979,31 +975,18 @@ static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, 
	native_set_pte(ptep, pte);

}



static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,

static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,

			      pmd_t *pmdp, pmd_t pmd)

{

	native_set_pmd(pmdp, pmd);

}



static inline void native_set_pud_at(struct mm_struct *mm, unsigned long addr,

static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,

			      pud_t *pudp, pud_t pud)

{

	native_set_pud(pudp, pud);

}



#ifndef CONFIG_PARAVIRT

/*

 * Rules for using pte_update - it must be called after any PTE update which

 * has not been done using the set_pte / clear_pte interfaces.  It is used by

 * shadow mode hypervisors to resynchronize the shadow page tables.  Kernel PTE

 * updates should either be sets, clears, or set_pte_atomic for P->P

 * transitions, which means this hook should only be called for user PTEs.

 * This hook implies a P->P protection or access change has taken place, which

 * requires a subsequent TLB flush.

 */

#define pte_update(mm, addr, ptep)		do { } while (0)

#endif



/*

 * We only update the dirty/accessed state if we set

 * the dirty bit by hand in the kernel, since the hardware
@@ -1031,7 +1014,6 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 
				       pte_t *ptep)

{

	pte_t pte = native_ptep_get_and_clear(ptep);

	pte_update(mm, addr, ptep);

	return pte;

}
@@ -1058,7 +1040,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, 
				      unsigned long addr, pte_t *ptep)

{

	clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);

	pte_update(mm, addr, ptep);

}



#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)