Loading arch/powerpc/include/asm/eeh.h +2 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ struct device_node; #define EEH_PROBE_MODE_DEV 0x04 /* From PCI device */ #define EEH_PROBE_MODE_DEVTREE 0x08 /* From device tree */ #define EEH_ENABLE_IO_FOR_LOG 0x10 /* Enable IO for log */ #define EEH_EARLY_DUMP_LOG 0x20 /* Dump log immediately */ /* * Delay for PE reset, all in ms Loading Loading @@ -72,6 +73,7 @@ struct device_node; #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */ #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ #define EEH_PE_CFG_BLOCKED (1 << 2) /* Block config access */ #define EEH_PE_RESET (1 << 3) /* PE reset in progress */ #define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */ #define EEH_PE_CFG_RESTRICTED (1 << 9) /* Block config on error */ Loading arch/powerpc/include/asm/machdep.h +1 −1 Original line number Diff line number Diff line Loading @@ -60,7 +60,7 @@ struct machdep_calls { void (*hugepage_invalidate)(unsigned long vsid, unsigned long addr, unsigned char *hpte_slot_array, int psize, int ssize); int psize, int ssize, int local); /* special for kexec, to be called in real mode, linear mapping is * destroyed as well */ void (*hpte_clear_all)(void); Loading arch/powerpc/include/asm/opal.h +0 −104 Original line number Diff line number Diff line Loading @@ -288,62 +288,6 @@ enum OpalMessageType { OPAL_MSG_TYPE_MAX, }; /* Machine check related definitions */ enum OpalMCE_Version { OpalMCE_V1 = 1, }; enum OpalMCE_Severity { OpalMCE_SEV_NO_ERROR = 0, OpalMCE_SEV_WARNING = 1, OpalMCE_SEV_ERROR_SYNC = 2, OpalMCE_SEV_FATAL = 3, }; enum OpalMCE_Disposition { OpalMCE_DISPOSITION_RECOVERED = 0, OpalMCE_DISPOSITION_NOT_RECOVERED = 1, }; enum OpalMCE_Initiator { OpalMCE_INITIATOR_UNKNOWN = 0, OpalMCE_INITIATOR_CPU = 1, }; enum OpalMCE_ErrorType { OpalMCE_ERROR_TYPE_UNKNOWN = 0, OpalMCE_ERROR_TYPE_UE = 1, OpalMCE_ERROR_TYPE_SLB = 2, OpalMCE_ERROR_TYPE_ERAT = 3, OpalMCE_ERROR_TYPE_TLB = 4, }; enum OpalMCE_UeErrorType { OpalMCE_UE_ERROR_INDETERMINATE = 0, OpalMCE_UE_ERROR_IFETCH = 1, OpalMCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2, OpalMCE_UE_ERROR_LOAD_STORE = 3, OpalMCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4, }; enum OpalMCE_SlbErrorType { OpalMCE_SLB_ERROR_INDETERMINATE = 0, OpalMCE_SLB_ERROR_PARITY = 1, OpalMCE_SLB_ERROR_MULTIHIT = 2, }; enum OpalMCE_EratErrorType { OpalMCE_ERAT_ERROR_INDETERMINATE = 0, OpalMCE_ERAT_ERROR_PARITY = 1, OpalMCE_ERAT_ERROR_MULTIHIT = 2, }; enum OpalMCE_TlbErrorType { OpalMCE_TLB_ERROR_INDETERMINATE = 0, OpalMCE_TLB_ERROR_PARITY = 1, OpalMCE_TLB_ERROR_MULTIHIT = 2, }; enum OpalThreadStatus { OPAL_THREAD_INACTIVE = 0x0, OPAL_THREAD_STARTED = 0x1, Loading Loading @@ -467,54 +411,6 @@ struct opal_ipmi_msg { uint8_t data[]; }; struct opal_machine_check_event { enum OpalMCE_Version version:8; /* 0x00 */ uint8_t in_use; /* 0x01 */ enum OpalMCE_Severity severity:8; /* 0x02 */ enum OpalMCE_Initiator initiator:8; /* 0x03 */ enum OpalMCE_ErrorType error_type:8; /* 0x04 */ enum OpalMCE_Disposition disposition:8; /* 0x05 */ uint8_t reserved_1[2]; /* 0x06 */ uint64_t gpr3; /* 0x08 */ uint64_t srr0; /* 0x10 */ uint64_t srr1; /* 0x18 */ union { /* 0x20 */ struct { enum OpalMCE_UeErrorType ue_error_type:8; uint8_t effective_address_provided; uint8_t physical_address_provided; uint8_t reserved_1[5]; uint64_t effective_address; uint64_t physical_address; uint8_t reserved_2[8]; } ue_error; struct { enum OpalMCE_SlbErrorType slb_error_type:8; uint8_t effective_address_provided; uint8_t reserved_1[6]; uint64_t effective_address; uint8_t reserved_2[16]; } slb_error; struct { enum OpalMCE_EratErrorType erat_error_type:8; uint8_t effective_address_provided; uint8_t reserved_1[6]; uint64_t effective_address; uint8_t reserved_2[16]; } erat_error; struct { enum OpalMCE_TlbErrorType tlb_error_type:8; uint8_t effective_address_provided; uint8_t reserved_1[6]; uint64_t effective_address; uint8_t reserved_2[16]; } tlb_error; } u; }; /* FSP memory errors handling */ enum OpalMemErr_Version { OpalMemErr_V1 = 1, Loading arch/powerpc/include/asm/paca.h +0 −7 Original line number Diff line number Diff line Loading @@ -42,7 +42,6 @@ extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ #define get_slb_shadow() (get_paca()->slb_shadow_ptr) struct task_struct; struct opal_machine_check_event; /* * Defines the layout of the paca. Loading Loading @@ -153,12 +152,6 @@ struct paca_struct { u64 tm_scratch; /* TM scratch area for reclaim */ #endif #ifdef CONFIG_PPC_POWERNV /* Pointer to OPAL machine check event structure set by the * early exception handler for use by high level C handler */ struct opal_machine_check_event *opal_mc_evt; #endif #ifdef CONFIG_PPC_BOOK3S_64 /* Exclusive emergency stack pointer for machine check exception. */ void *mc_emergency_sp; Loading arch/powerpc/include/asm/tlbflush.h +3 −1 Original line number Diff line number Diff line Loading @@ -127,7 +127,9 @@ static inline void arch_leave_lazy_mmu_mode(void) extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize, int local); extern void flush_hash_range(unsigned long number, int local); extern void flush_hash_hugepage(unsigned long vsid, unsigned long addr, pmd_t *pmdp, unsigned int psize, int ssize, int local); static inline void local_flush_tlb_mm(struct mm_struct *mm) { Loading Loading
arch/powerpc/include/asm/eeh.h +2 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ struct device_node; #define EEH_PROBE_MODE_DEV 0x04 /* From PCI device */ #define EEH_PROBE_MODE_DEVTREE 0x08 /* From device tree */ #define EEH_ENABLE_IO_FOR_LOG 0x10 /* Enable IO for log */ #define EEH_EARLY_DUMP_LOG 0x20 /* Dump log immediately */ /* * Delay for PE reset, all in ms Loading Loading @@ -72,6 +73,7 @@ struct device_node; #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */ #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ #define EEH_PE_CFG_BLOCKED (1 << 2) /* Block config access */ #define EEH_PE_RESET (1 << 3) /* PE reset in progress */ #define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */ #define EEH_PE_CFG_RESTRICTED (1 << 9) /* Block config on error */ Loading
arch/powerpc/include/asm/machdep.h +1 −1 Original line number Diff line number Diff line Loading @@ -60,7 +60,7 @@ struct machdep_calls { void (*hugepage_invalidate)(unsigned long vsid, unsigned long addr, unsigned char *hpte_slot_array, int psize, int ssize); int psize, int ssize, int local); /* special for kexec, to be called in real mode, linear mapping is * destroyed as well */ void (*hpte_clear_all)(void); Loading
arch/powerpc/include/asm/opal.h +0 −104 Original line number Diff line number Diff line Loading @@ -288,62 +288,6 @@ enum OpalMessageType { OPAL_MSG_TYPE_MAX, }; /* Machine check related definitions */ enum OpalMCE_Version { OpalMCE_V1 = 1, }; enum OpalMCE_Severity { OpalMCE_SEV_NO_ERROR = 0, OpalMCE_SEV_WARNING = 1, OpalMCE_SEV_ERROR_SYNC = 2, OpalMCE_SEV_FATAL = 3, }; enum OpalMCE_Disposition { OpalMCE_DISPOSITION_RECOVERED = 0, OpalMCE_DISPOSITION_NOT_RECOVERED = 1, }; enum OpalMCE_Initiator { OpalMCE_INITIATOR_UNKNOWN = 0, OpalMCE_INITIATOR_CPU = 1, }; enum OpalMCE_ErrorType { OpalMCE_ERROR_TYPE_UNKNOWN = 0, OpalMCE_ERROR_TYPE_UE = 1, OpalMCE_ERROR_TYPE_SLB = 2, OpalMCE_ERROR_TYPE_ERAT = 3, OpalMCE_ERROR_TYPE_TLB = 4, }; enum OpalMCE_UeErrorType { OpalMCE_UE_ERROR_INDETERMINATE = 0, OpalMCE_UE_ERROR_IFETCH = 1, OpalMCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2, OpalMCE_UE_ERROR_LOAD_STORE = 3, OpalMCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4, }; enum OpalMCE_SlbErrorType { OpalMCE_SLB_ERROR_INDETERMINATE = 0, OpalMCE_SLB_ERROR_PARITY = 1, OpalMCE_SLB_ERROR_MULTIHIT = 2, }; enum OpalMCE_EratErrorType { OpalMCE_ERAT_ERROR_INDETERMINATE = 0, OpalMCE_ERAT_ERROR_PARITY = 1, OpalMCE_ERAT_ERROR_MULTIHIT = 2, }; enum OpalMCE_TlbErrorType { OpalMCE_TLB_ERROR_INDETERMINATE = 0, OpalMCE_TLB_ERROR_PARITY = 1, OpalMCE_TLB_ERROR_MULTIHIT = 2, }; enum OpalThreadStatus { OPAL_THREAD_INACTIVE = 0x0, OPAL_THREAD_STARTED = 0x1, Loading Loading @@ -467,54 +411,6 @@ struct opal_ipmi_msg { uint8_t data[]; }; struct opal_machine_check_event { enum OpalMCE_Version version:8; /* 0x00 */ uint8_t in_use; /* 0x01 */ enum OpalMCE_Severity severity:8; /* 0x02 */ enum OpalMCE_Initiator initiator:8; /* 0x03 */ enum OpalMCE_ErrorType error_type:8; /* 0x04 */ enum OpalMCE_Disposition disposition:8; /* 0x05 */ uint8_t reserved_1[2]; /* 0x06 */ uint64_t gpr3; /* 0x08 */ uint64_t srr0; /* 0x10 */ uint64_t srr1; /* 0x18 */ union { /* 0x20 */ struct { enum OpalMCE_UeErrorType ue_error_type:8; uint8_t effective_address_provided; uint8_t physical_address_provided; uint8_t reserved_1[5]; uint64_t effective_address; uint64_t physical_address; uint8_t reserved_2[8]; } ue_error; struct { enum OpalMCE_SlbErrorType slb_error_type:8; uint8_t effective_address_provided; uint8_t reserved_1[6]; uint64_t effective_address; uint8_t reserved_2[16]; } slb_error; struct { enum OpalMCE_EratErrorType erat_error_type:8; uint8_t effective_address_provided; uint8_t reserved_1[6]; uint64_t effective_address; uint8_t reserved_2[16]; } erat_error; struct { enum OpalMCE_TlbErrorType tlb_error_type:8; uint8_t effective_address_provided; uint8_t reserved_1[6]; uint64_t effective_address; uint8_t reserved_2[16]; } tlb_error; } u; }; /* FSP memory errors handling */ enum OpalMemErr_Version { OpalMemErr_V1 = 1, Loading
arch/powerpc/include/asm/paca.h +0 −7 Original line number Diff line number Diff line Loading @@ -42,7 +42,6 @@ extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ #define get_slb_shadow() (get_paca()->slb_shadow_ptr) struct task_struct; struct opal_machine_check_event; /* * Defines the layout of the paca. Loading Loading @@ -153,12 +152,6 @@ struct paca_struct { u64 tm_scratch; /* TM scratch area for reclaim */ #endif #ifdef CONFIG_PPC_POWERNV /* Pointer to OPAL machine check event structure set by the * early exception handler for use by high level C handler */ struct opal_machine_check_event *opal_mc_evt; #endif #ifdef CONFIG_PPC_BOOK3S_64 /* Exclusive emergency stack pointer for machine check exception. */ void *mc_emergency_sp; Loading
arch/powerpc/include/asm/tlbflush.h +3 −1 Original line number Diff line number Diff line Loading @@ -127,7 +127,9 @@ static inline void arch_leave_lazy_mmu_mode(void) extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize, int local); extern void flush_hash_range(unsigned long number, int local); extern void flush_hash_hugepage(unsigned long vsid, unsigned long addr, pmd_t *pmdp, unsigned int psize, int ssize, int local); static inline void local_flush_tlb_mm(struct mm_struct *mm) { Loading