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Commit b51c5194 authored by Leo Liu's avatar Leo Liu Committed by Alex Deucher
Browse files

drm/amdgpu: add VEGAM support to vi 



Signed-off-by: default avatarLeo Liu <leo.liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a7712897

drivers/gpu/drm/amd/amdgpu/vi.c

+29 −2
Original line number Diff line number Diff line
@@ -305,9 +305,10 @@ static void vi_init_golden_registers(struct amdgpu_device *adev) 
							stoney_mgcg_cgcg_init,

							ARRAY_SIZE(stoney_mgcg_cgcg_init));

		break;

	case CHIP_POLARIS11:

	case CHIP_POLARIS10:

	case CHIP_POLARIS11:

	case CHIP_POLARIS12:

	case CHIP_VEGAM:

	default:

		break;

	}
@@ -1096,6 +1097,30 @@ static int vi_common_early_init(void *handle) 
		adev->pg_flags = 0;

		adev->external_rev_id = adev->rev_id + 0x64;

		break;

	case CHIP_VEGAM:

		adev->cg_flags = 0;

			/*AMD_CG_SUPPORT_GFX_MGCG |

			AMD_CG_SUPPORT_GFX_RLC_LS |

			AMD_CG_SUPPORT_GFX_CP_LS |

			AMD_CG_SUPPORT_GFX_CGCG |

			AMD_CG_SUPPORT_GFX_CGLS |

			AMD_CG_SUPPORT_GFX_3D_CGCG |

			AMD_CG_SUPPORT_GFX_3D_CGLS |

			AMD_CG_SUPPORT_SDMA_MGCG |

			AMD_CG_SUPPORT_SDMA_LS |

			AMD_CG_SUPPORT_BIF_MGCG |

			AMD_CG_SUPPORT_BIF_LS |

			AMD_CG_SUPPORT_HDP_MGCG |

			AMD_CG_SUPPORT_HDP_LS |

			AMD_CG_SUPPORT_ROM_MGCG |

			AMD_CG_SUPPORT_MC_MGCG |

			AMD_CG_SUPPORT_MC_LS |

			AMD_CG_SUPPORT_DRM_LS |

			AMD_CG_SUPPORT_UVD_MGCG |

			AMD_CG_SUPPORT_VCE_MGCG;*/

		adev->pg_flags = 0;

		adev->external_rev_id = adev->rev_id + 0x6E;

		break;

	case CHIP_CARRIZO:

		adev->cg_flags = AMD_CG_SUPPORT_UVD_MGCG |

			AMD_CG_SUPPORT_GFX_MGCG |
@@ -1487,6 +1512,7 @@ static int vi_common_set_clockgating_state(void *handle, 
	case CHIP_POLARIS10:

	case CHIP_POLARIS11:

	case CHIP_POLARIS12:

	case CHIP_VEGAM:

		vi_common_set_clockgating_state_by_smu(adev, state);

	default:

		break;
@@ -1616,9 +1642,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) 
			amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block);

		}

		break;

	case CHIP_POLARIS11:

	case CHIP_POLARIS10:

	case CHIP_POLARIS11:

	case CHIP_POLARIS12:

	case CHIP_VEGAM:

		amdgpu_device_ip_block_add(adev, &vi_common_ip_block);

		amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block);

		amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);