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Commit b4deace9 authored by Sriharsha Allenki's avatar Sriharsha Allenki
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ARM: dts: msm: Add sleep clock for HS PHY on QCS405 



For HS PHY to trigger any interrupts in suspend it
required sleep clock to be enabled.
So, enable add the proper sleep clock and enable it
on probe.

Change-Id: Ib7816dfb677fb8076b15c6e44accba140bc4f326
Signed-off-by: default avatarSriharsha Allenki <sallenki@codeaurora.org>
parent da94ab0a

arch/arm64/boot/dts/qcom/qcs405-usb.dtsi

+6 −4
Original line number Diff line number Diff line
@@ -79,8 +79,9 @@ 
		qcom,vdd-voltage-level = <0 1144000 1200000>;



		clocks = <&clock_rpmcc RPM_SMD_LN_BB_CLK>,

			 <&clock_gcc GCC_USB_HS_PHY_CFG_AHB_CLK>;

		clock-names = "ref_clk", "phy_csr_clk";

			 <&clock_gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,

			 <&clock_gcc GCC_USB2A_PHY_SLEEP_CLK>;

		clock-names = "ref_clk", "phy_csr_clk", "sleep_clk";



		resets = <&clock_gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,

			 <&clock_gcc GCC_USB2A_PHY_BCR>;
@@ -184,8 +185,9 @@ 
		qcom,vdd-voltage-level = <0 1144000 1200000>;



		clocks = <&clock_rpmcc RPM_SMD_LN_BB_CLK>,

			 <&clock_gcc GCC_USB_HS_PHY_CFG_AHB_CLK>;

		clock-names = "ref_clk", "phy_csr_clk";

			 <&clock_gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,

			 <&clock_gcc GCC_USB2A_PHY_SLEEP_CLK>;

		clock-names = "ref_clk", "phy_csr_clk", "sleep_clk";



		resets = <&clock_gcc GCC_QUSB2_PHY_BCR>,

			 <&clock_gcc GCC_USB2_HS_PHY_ONLY_BCR>;