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Commit b3e404fb authored by Jiten Patel's avatar Jiten Patel
Browse files

ARM: dts: msm: Add crypto device nodes for sdm429 



Add qcedev and qcrypto device nodes to enable HW
crypto engine operations for user and kernel space
apps.

Change-Id: I46584a4d9d47343ff74fc94a07531297714ac2f1
Signed-off-by: default avatarJiten Patel <jitepate@codeaurora.org>
parent 2dfc4214

arch/arm64/boot/dts/qcom/sdm429.dtsi

+57 −0
Original line number Diff line number Diff line
@@ -1307,6 +1307,63 @@ 
		reg = <0x08600720 0x2000>;

	};



	qcom_crypto: qcrypto@720000 {

		compatible = "qcom,qcrypto";

		reg = <0x720000 0x20000>,

			<0x704000 0x20000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 207 0>;

		qcom,bam-pipe-pair = <2>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,ce-hw-shared;

		qcom,clk-mgmt-sus-res;

		qcom,msm-bus,name = "qcrypto-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<55 512 0 0>,

			<55 512 393600 393600>;

		clocks = <&gcc CRYPTO_CLK_SRC>,

			<&gcc GCC_CRYPTO_CLK>,

			<&gcc GCC_CRYPTO_AHB_CLK>,

			<&gcc GCC_CRYPTO_AXI_CLK>;

		clock-names = "core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		qcom,use-sw-aes-cbc-ecb-ctr-algo;

		qcom,use-sw-aes-xts-algo;

		qcom,use-sw-aes-ccm-algo;

		qcom,use-sw-ahash-algo;

		qcom,use-sw-hmac-algo;

		qcom,use-sw-aead-algo;

		qcom,ce-opp-freq = <100000000>;

	};



	qcom_cedev: qcedev@720000 {

		compatible = "qcom,qcedev";

		reg = <0x720000 0x20000>,

			<0x704000 0x20000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 207 0>;

		qcom,bam-pipe-pair = <1>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,ce-hw-shared;

		qcom,msm-bus,name = "qcedev-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<55 512 0 0>,

			<55 512 393600 393600>;

		clocks = <&gcc CRYPTO_CLK_SRC>,

			<&gcc GCC_CRYPTO_CLK>,

			<&gcc GCC_CRYPTO_AHB_CLK>,

			<&gcc GCC_CRYPTO_AXI_CLK>;

		clock-names = "core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		qcom,ce-opp-freq = <100000000>;

	};



	qcom,wcnss-wlan@0a000000 {

		compatible = "qcom,wcnss_wlan";

		reg = <0x0a000000 0x280000>,