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Commit b2602aa8 authored by Veera Vegivada's avatar Veera Vegivada
Browse files

clk: qcom: Add debug clock controller for sdmshrike



Add the debug mux structure with inputs for measuring the
clocks on sdmshrike.

Change-Id: I7dfc471ca7bad7eb4be3cd04362f558a71b53b5d
Signed-off-by: default avatarVeera Vegivada <vvegivad@codeaurora.org>
parent 432c6504
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+2 −1
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@@ -8,7 +8,8 @@ Required properties :
		"qcom,debugcc-sdmmagpie"
		"qcom,debugcc-sdxprairie",
		"qcom,debugcc-trinket",
		"qcom,atoll-debugcc".
		"qcom,atoll-debugcc",
		"qcom,debugcc-sdmshrike".
- qcom,gcc: phandle to the GCC device node.
- qcom,videocc: phandle to the Video CC device node.
- qcom,camcc: phandle to the Camera CC device node.
+9 −0
Original line number Diff line number Diff line
@@ -326,6 +326,15 @@ config MSM_CAMCC_SDMSHRIKE
          Say Y if you want to support camera devices and functionality such as
	  capturing pictures.

config MSM_DEBUGCC_SDMSHRIKE
	tristate "SDMSHRIKE Debug Clock Controller"
	depends on COMMON_CLK_QCOM
	help
	  Support for the debug clock controller on Qualcomm Technologies, Inc
	  SDMSHRIKE devices.
	  Say Y if you want to support the clock measurement functionality for
	  measuring the clock frequency.

config MDM_GCC_QCS405
	tristate "QCS405 Global Clock Controller"
	select QCOM_GDSC
+1 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ obj-$(CONFIG_MSM_CAMCC_SDMMAGPIE) += camcc-sdmmagpie.o
obj-$(CONFIG_MSM_CAMCC_SDMSHRIKE) += camcc-sdmshrike.o
obj-$(CONFIG_MSM_CLK_AOP_QMP) += clk-aop-qmp.o
obj-$(CONFIG_MSM_CLK_RPMH) += clk-rpmh.o
obj-$(CONFIG_MSM_DEBUGCC_SDMSHRIKE) += debugcc-sdmshrike.o
obj-$(CONFIG_MSM_DEBUGCC_SM6150) += debugcc-sm6150.o
obj-$(CONFIG_MSM_DEBUGCC_SM8150) += debugcc-sm8150.o
obj-$(CONFIG_MSM_DISPCC_SM6150) += dispcc-sm6150.o
+890 −0

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+37 −0
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@@ -202,6 +202,39 @@ static const char * const gcc_parent_names_8[] = {
	"core_bi_pll_test_se",
};

static struct clk_dummy measure_only_cnoc_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "measure_only_cnoc_clk",
		.ops = &clk_dummy_ops,
	},
};

static struct clk_dummy measure_only_snoc_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "measure_only_snoc_clk",
		.ops = &clk_dummy_ops,
	},
};

static struct clk_dummy measure_only_mccc_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "measure_only_mccc_clk",
		.ops = &clk_dummy_ops,
	},
};


static struct clk_dummy measure_only_ipa_2x_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "measure_only_ipa_2x_clk",
		.ops = &clk_dummy_ops,
	},
};

/* Only used to cast a vote on the MMCX rail until late_initcall_sync */
static struct clk_dummy mmcx_clk = {
	.rrate = 1000,
@@ -4742,6 +4775,10 @@ static struct clk_branch gcc_video_xo_clk = {
};

struct clk_hw *gcc_sdmshrike_hws[] = {
	[MEASURE_ONLY_SNOC_CLK] = &measure_only_snoc_clk.hw,
	[MEASURE_ONLY_CNOC_CLK] = &measure_only_cnoc_clk.hw,
	[MEASURE_ONLY_MCCC_CLK] = &measure_only_mccc_clk.hw,
	[MEASURE_ONLY_IPA_2X_CLK] = &measure_only_ipa_2x_clk.hw,
	[MMCX_CLK] = &mmcx_clk.hw,
};

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