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Commit b1415819 authored by Vivek Natarajan's avatar Vivek Natarajan Committed by John W. Linville
Browse files

ath9k_hw: Add a function to read sqsum_dvc. 



Add a function to observe the delta VC of BB_PLL.
For a good chip, the sqsum_dvc is below 2000.

Signed-off-by: default avatarVivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 74f76359

drivers/net/wireless/ath/ath9k/hw.c

+13 −0
Original line number Diff line number Diff line
@@ -668,6 +668,19 @@ static void ath9k_hw_init_qos(struct ath_hw *ah) 
	REGWRITE_BUFFER_FLUSH(ah);

}



unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)

{

		REG_WRITE(ah, PLL3, (REG_READ(ah, PLL3) & ~(PLL3_DO_MEAS_MASK)));

		udelay(100);

		REG_WRITE(ah, PLL3, (REG_READ(ah, PLL3) | PLL3_DO_MEAS_MASK));



		while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0)

			udelay(100);



		return (REG_READ(ah, PLL3) & SQSUM_DVC_MASK) >> 3;

}

EXPORT_SYMBOL(ar9003_get_pll_sqsum_dvc);



static void ath9k_hw_init_pll(struct ath_hw *ah,

			      struct ath9k_channel *chan)

{

drivers/net/wireless/ath/ath9k/hw.h

+1 −0
Original line number Diff line number Diff line
@@ -928,6 +928,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64); 
void ath9k_hw_reset_tsf(struct ath_hw *ah);

void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);

void ath9k_hw_init_global_settings(struct ath_hw *ah);

unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);

void ath9k_hw_set11nmac2040(struct ath_hw *ah);

void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);

void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,

drivers/net/wireless/ath/ath9k/reg.h

+6 −0
Original line number Diff line number Diff line
@@ -1129,6 +1129,12 @@ enum { 
#define AR_RTC_PLL_CLKSEL       0x00000300

#define AR_RTC_PLL_CLKSEL_S     8



#define PLL3 0x16188

#define PLL3_DO_MEAS_MASK 0x40000000

#define PLL4 0x1618c

#define PLL4_MEAS_DONE    0x8

#define SQSUM_DVC_MASK 0x007ffff8



#define AR_RTC_RESET \

	((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)

#define AR_RTC_RESET_EN		(0x00000001)