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Commit b10aaf58 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/sde: add support to handle reduction in dma linewidth" into dev/msm-4.14-display

parents 56ca51bd 86ba212e

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+9 −0
Original line number Original line Diff line number Diff line
@@ -150,6 +150,7 @@ enum sde_prop { 
	SDE_OFF,

	SDE_OFF,

	SDE_LEN,

	SDE_LEN,

	SSPP_LINEWIDTH,

	SSPP_LINEWIDTH,

	VIG_SSPP_LINEWIDTH,

	MIXER_LINEWIDTH,

	MIXER_LINEWIDTH,

	MIXER_BLEND,

	MIXER_BLEND,

	WB_LINEWIDTH,

	WB_LINEWIDTH,
@@ -434,6 +435,8 @@ static struct sde_prop_type sde_prop[] = { 
	{SDE_OFF, "qcom,sde-off", true, PROP_TYPE_U32},

	{SDE_OFF, "qcom,sde-off", true, PROP_TYPE_U32},

	{SDE_LEN, "qcom,sde-len", false, PROP_TYPE_U32},

	{SDE_LEN, "qcom,sde-len", false, PROP_TYPE_U32},

	{SSPP_LINEWIDTH, "qcom,sde-sspp-linewidth", false, PROP_TYPE_U32},

	{SSPP_LINEWIDTH, "qcom,sde-sspp-linewidth", false, PROP_TYPE_U32},

	{VIG_SSPP_LINEWIDTH, "qcom,sde-vig-sspp-linewidth", false,

			PROP_TYPE_U32},

	{MIXER_LINEWIDTH, "qcom,sde-mixer-linewidth", false, PROP_TYPE_U32},

	{MIXER_LINEWIDTH, "qcom,sde-mixer-linewidth", false, PROP_TYPE_U32},

	{MIXER_BLEND, "qcom,sde-mixer-blendstages", false, PROP_TYPE_U32},

	{MIXER_BLEND, "qcom,sde-mixer-blendstages", false, PROP_TYPE_U32},

	{WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32},

	{WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32},
@@ -1018,6 +1021,7 @@ static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg, 
	struct sde_sspp_cfg *sspp, struct sde_sspp_sub_blks *sblk,

	struct sde_sspp_cfg *sspp, struct sde_sspp_sub_blks *sblk,

	bool *prop_exists, struct sde_prop_value *prop_value, u32 *vig_count)

	bool *prop_exists, struct sde_prop_value *prop_value, u32 *vig_count)

{

{

	sblk->maxlinewidth = sde_cfg->vig_sspp_linewidth;

	sblk->maxupscale = MAX_UPSCALE_RATIO;

	sblk->maxupscale = MAX_UPSCALE_RATIO;

	sblk->maxdwnscale = MAX_DOWNSCALE_RATIO;

	sblk->maxdwnscale = MAX_DOWNSCALE_RATIO;

	sspp->id = SSPP_VIG0 + *vig_count;

	sspp->id = SSPP_VIG0 + *vig_count;
@@ -2985,6 +2989,11 @@ static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) 
	if (!prop_exists[SSPP_LINEWIDTH])

	if (!prop_exists[SSPP_LINEWIDTH])

		cfg->max_sspp_linewidth = DEFAULT_SDE_LINE_WIDTH;

		cfg->max_sspp_linewidth = DEFAULT_SDE_LINE_WIDTH;





	cfg->vig_sspp_linewidth = PROP_VALUE_ACCESS(prop_value,

			VIG_SSPP_LINEWIDTH, 0);

	if (!prop_exists[VIG_SSPP_LINEWIDTH])

		cfg->vig_sspp_linewidth = cfg->max_sspp_linewidth;



	cfg->max_mixer_width = PROP_VALUE_ACCESS(prop_value,

	cfg->max_mixer_width = PROP_VALUE_ACCESS(prop_value,

			MIXER_LINEWIDTH, 0);

			MIXER_LINEWIDTH, 0);

	if (!prop_exists[MIXER_LINEWIDTH])

	if (!prop_exists[MIXER_LINEWIDTH])

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -1095,6 +1095,7 @@ struct sde_perf_cfg { 
 * register offsets, capabilities of the all MDSS HW sub-blocks.

 * register offsets, capabilities of the all MDSS HW sub-blocks.

 *

 *

 * @max_sspp_linewidth max source pipe line width support.

 * @max_sspp_linewidth max source pipe line width support.

 * @vig_sspp_linewidth max vig source pipe line width support.

 * @max_mixer_width    max layer mixer line width support.

 * @max_mixer_width    max layer mixer line width support.

 * @max_mixer_blendstages max layer mixer blend stages or

 * @max_mixer_blendstages max layer mixer blend stages or

 *                       supported z order

 *                       supported z order
@@ -1149,6 +1150,7 @@ struct sde_mdss_cfg { 
	u32 hwversion;

	u32 hwversion;





	u32 max_sspp_linewidth;

	u32 max_sspp_linewidth;

	u32 vig_sspp_linewidth;

	u32 max_mixer_width;

	u32 max_mixer_width;

	u32 max_mixer_blendstages;

	u32 max_mixer_blendstages;

	u32 max_wb_linewidth;

	u32 max_wb_linewidth;