Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aea0a053 authored by Rakesh Pillai's avatar Rakesh Pillai Committed by Gerrit - the friendly Code Review server
Browse files

BACKPORT: UPSTREAM: ath10k: add hw params for shadow register support 



wcn3990 supports shadow register for ce write.

Add a hw param for shadow register support.

Signed-off-by: default avatarRakesh Pillai <pillair@codeaurora.org>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
[govinds@codeaurora.org: resolve trivial merge conflicts in
drivers/net/wireless/ath/ath10k/core.c]
Change-Id: I0797078c50f7531ecaccc7c305db9f2d6c6e1835
Git-commit: b2e40d7a
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git


Signed-off-by: default avatarGovind Singh <govinds@codeaurora.org>
parent 5b7ac894

drivers/net/wireless/ath/ath10k/core.c

+14 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA988X_HW_2_0_VERSION,
@@ -119,6 +120,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.shadow_reg_support = false,

	},

	{

		.id = QCA9887_HW_1_0_VERSION,
@@ -149,6 +151,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA6174_HW_2_1_VERSION,
@@ -178,6 +181,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA6174_HW_2_1_VERSION,
@@ -207,6 +211,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA6174_HW_3_0_VERSION,
@@ -236,6 +241,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA6174_HW_3_2_VERSION,
@@ -268,6 +274,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -303,6 +310,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA9984_HW_1_0_DEV_VERSION,
@@ -345,6 +353,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA9888_HW_2_0_DEV_VERSION,
@@ -384,6 +393,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA9377_HW_1_0_DEV_VERSION,
@@ -413,6 +423,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA9377_HW_1_1_DEV_VERSION,
@@ -444,6 +455,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = QCA4019_HW_1_0_DEV_VERSION,
@@ -480,6 +492,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

	},

	{

		.id = WCN3990_HW_1_0_DEV_VERSION,
@@ -501,6 +514,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.target_64bit = true,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,

		.per_ce_irq = true,

		.shadow_reg_support = true,

	},

};

drivers/net/wireless/ath/ath10k/hw.h

+4 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2005-2011 Atheros Communications Inc.

 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.

 * Copyright (c) 2018 The Linux Foundation. All rights reserved.

 *

 * Permission to use, copy, modify, and/or distribute this software for any

 * purpose with or without fee is hereby granted, provided that the above
@@ -575,6 +576,9 @@ struct ath10k_hw_params { 


	/* target supporting per ce IRQ */

	bool per_ce_irq;



	/* target supporting shadow register for ce write */

	bool shadow_reg_support;

};



struct htt_rx_desc;