clk: qcom: npucc-sm8150: update dp_cal clock plan

Update PLL testctl configuration and new frequency plan
and corresponding voltage levels for dp_cal clocks.
Add VDD_MM_NUM to accommodate vdd_mm that supports
fewer vdd levels.

Change-Id: Ic5610fe2d92b9410bee172cc4e92c36006a49268
Signed-off-by: David Dai <daidavid1@codeaurora.org>