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Commit acda4a81 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "net: stmmac: Fix overflow in sub second increment"

parents 1b044613 b2758981
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+6 −6
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr,
					      u32 ptp_clock, int gmac4)
{
	u32 value = readl(ioaddr + PTP_TCR);
	unsigned long ss_inc = 0, sns_inc = 0, ptpclock = 0;
	u64 ss_inc = 0, sns_inc = 0, ptpclock = 0;
	u32 reg_value;

	/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
@@ -43,19 +43,19 @@ static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr,
	 * where ptp_clock is 50MHz if fine method is used to update system
	 */
	if (value & PTP_TCR_TSCFUPDT)
		ptpclock = (unsigned long)ptp_clock;
		ptpclock = (u64)ptp_clock;
	else
		ptpclock = (unsigned long)ptp_clock;
		ptpclock = (u64)ptp_clock;

	ss_inc = ((1 * 1000000000ULL) / ptpclock);
	ss_inc = div_u64((1 * 1000000000ULL), ptpclock);
	sns_inc = 1000000000ULL - (ss_inc * ptpclock); //take remainder

	//sns_inc needs to be multiplied by 2^8, per spec.
	sns_inc = (sns_inc * 256) / ptpclock;
	sns_inc = div_u64((sns_inc * 256), ptpclock);

	/* 0.465ns accuracy */
	if (!(value & PTP_TCR_TSCTRLSSR))
		ss_inc = (ss_inc * 1000) / 465;
		ss_inc = div_u64((ss_inc * 1000), 465);

	ss_inc &= PTP_SSIR_SSINC_MASK;
	sns_inc &= PTP_SSIR_SNSINC_MASK;