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Commit aca4ed89 authored by rahsha's avatar rahsha Committed by Rahul Sharma
Browse files

ARM: dts: msm: Remove GPU low svs clocks for SA6155



As per new clock plan for GFX3D clock, low svs levels are
not required so update the gpu pwr levels for msm_gpu node.

Change-Id: I788abe7c90475867d09d7d4ff819df14f7319876
Signed-off-by: default avatarRahul Sharma <rahsha@codeaurora.org>
parent 6ee61fd3
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+14 −66
Original line number Diff line number Diff line
@@ -189,6 +189,8 @@
	 * is calulated as FMAX/4.8 MHz round up to zero
	 * decimal places.
	 */

	/delete-node/qcom,gpu-pwrlevel-bins;
	qcom,gpu-pwrlevel-bins {
		#address-cells = <1>;
		#size-cells = <0>;
@@ -201,7 +203,7 @@

			qcom,speed-bin = <0>;

			qcom,initial-pwrlevel = <5>;
			qcom,initial-pwrlevel = <4>;
			qcom,ca-target-pwrlevel = <3>;

			/* TURBO */
@@ -249,18 +251,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@6 {
				reg = <6>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -274,7 +267,7 @@

			qcom,speed-bin = <177>;

			qcom,initial-pwrlevel = <5>;
			qcom,initial-pwrlevel = <4>;
			qcom,ca-target-pwrlevel = <3>;

			/* TURBO */
@@ -322,18 +315,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@6 {
				reg = <6>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -347,7 +331,7 @@

			qcom,speed-bin = <156>;

			qcom,initial-pwrlevel = <4>;
			qcom,initial-pwrlevel = <3>;
			qcom,ca-target-pwrlevel = <2>;

			/* NOM L1 */
@@ -386,18 +370,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -411,7 +386,7 @@

			qcom,speed-bin = <136>;

			qcom,initial-pwrlevel = <3>;
			qcom,initial-pwrlevel = <2>;
			qcom,ca-target-pwrlevel = <1>;

			/* NOM */
@@ -441,18 +416,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -467,7 +433,7 @@
			qcom,speed-bin = <105>;

			qcom,initial-pwrlevel = <1>;
			qcom,ca-target-pwrlevel = <2>;
			qcom,ca-target-pwrlevel = <0>;

			/* SVS L1 */
			qcom,gpu-pwrlevel@0 {
@@ -487,18 +453,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -512,7 +469,7 @@

			qcom,speed-bin = <73>;

			qcom,initial-pwrlevel = <1>;
			qcom,initial-pwrlevel = <0>;
			qcom,ca-target-pwrlevel = <0>;

			/* SVS */
@@ -524,18 +481,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@1 {
				reg = <1>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
+14 −66
Original line number Diff line number Diff line
@@ -212,6 +212,8 @@
	 * is calulated as FMAX/4.8 MHz round up to zero
	 * decimal places.
	 */

	/delete-node/qcom,gpu-pwrlevel-bins;
	qcom,gpu-pwrlevel-bins {
		#address-cells = <1>;
		#size-cells = <0>;
@@ -224,7 +226,7 @@

			qcom,speed-bin = <0>;

			qcom,initial-pwrlevel = <5>;
			qcom,initial-pwrlevel = <4>;
			qcom,ca-target-pwrlevel = <3>;

			/* TURBO */
@@ -272,18 +274,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@6 {
				reg = <6>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -297,7 +290,7 @@

			qcom,speed-bin = <177>;

			qcom,initial-pwrlevel = <5>;
			qcom,initial-pwrlevel = <4>;
			qcom,ca-target-pwrlevel = <3>;

			/* TURBO */
@@ -345,18 +338,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@6 {
				reg = <6>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -370,7 +354,7 @@

			qcom,speed-bin = <156>;

			qcom,initial-pwrlevel = <4>;
			qcom,initial-pwrlevel = <3>;
			qcom,ca-target-pwrlevel = <2>;

			/* NOM L1 */
@@ -409,18 +393,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -434,7 +409,7 @@

			qcom,speed-bin = <136>;

			qcom,initial-pwrlevel = <3>;
			qcom,initial-pwrlevel = <2>;
			qcom,ca-target-pwrlevel = <1>;

			/* NOM */
@@ -464,18 +439,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -490,7 +456,7 @@
			qcom,speed-bin = <105>;

			qcom,initial-pwrlevel = <1>;
			qcom,ca-target-pwrlevel = <2>;
			qcom,ca-target-pwrlevel = <0>;

			/* SVS L1 */
			qcom,gpu-pwrlevel@0 {
@@ -510,18 +476,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
@@ -535,7 +492,7 @@

			qcom,speed-bin = <73>;

			qcom,initial-pwrlevel = <1>;
			qcom,initial-pwrlevel = <0>;
			qcom,ca-target-pwrlevel = <0>;

			/* SVS */
@@ -547,18 +504,9 @@
				qcom,bus-max = <8>;
			};

			/* Low SVS */
			/* XO */
			qcom,gpu-pwrlevel@1 {
				reg = <1>;
				qcom,gpu-freq = <290000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <4>;
				qcom,bus-max = <5>;
			};

			/* XO */
			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <0>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;