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Commit ac802ad1 authored by Naveen Yadav's avatar Naveen Yadav
Browse files

clk: qcom: gcc: Update clock flags for reference clk 



Updating clock flags for gcc_usb3_prim_clkref_clk and
gcc_pcie_0_clkref_clk to BRANCH_HALT_DELAY as there are
no CLK_OFF bit corresponding to these reference clocks.

Change-Id: I91a9771cd4812cb2e679bf117437303eaffa1c09
Signed-off-by: default avatarNaveen Yadav <naveenky@codeaurora.org>
parent 664f57dc

drivers/clk/qcom/gcc-sdxprairie.c

+3 −3
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ 
#include "clk-branch.h"

#include "reset.h"

#include "clk-alpha-pll.h"

#include "vdd-level.h"

#include "vdd-level-sdxprairie.h"



#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
@@ -1366,7 +1366,7 @@ static struct clk_branch gcc_gp3_clk = { 


static struct clk_branch gcc_pcie_0_clkref_clk = {

	.halt_reg = 0x88004,

	.halt_check = BRANCH_HALT,

	.halt_check = BRANCH_HALT_DELAY,

	.clkr = {

		.enable_reg = 0x88004,

		.enable_mask = BIT(0),
@@ -1696,7 +1696,7 @@ static struct clk_branch gcc_usb3_phy_pipe_clk = { 


static struct clk_branch gcc_usb3_prim_clkref_clk = {

	.halt_reg = 0x88000,

	.halt_check = BRANCH_HALT,

	.halt_check = BRANCH_HALT_DELAY,

	.clkr = {

		.enable_reg = 0x88000,

		.enable_mask = BIT(0),