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Commit abbcf0e2 authored by Sinan Kaya's avatar Sinan Kaya Committed by Bjorn Helgaas
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PCI: Wait for device to become ready after a power management reset 



PCIe r4.0, sec 2.3.1, Request Handling Rules, indicates that a device can
return CRS Completion Status following a D3hot to D0 transition.  Wait
until the device becomes ready in that situation.

Signed-off-by: default avatarSinan Kaya <okaya@codeaurora.org>
Signed-off-by: default avatarBjorn Helgaas <helgaas@kernel.org>
Reviewed-by: default avatarChristoph Hellwig <hch@lst.de>
parent a2758b6b

drivers/pci/pci.c

+1 −1
Original line number Diff line number Diff line
@@ -4188,7 +4188,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) 
	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);

	pci_dev_d3_sleep(dev);



	return 0;

	return pci_dev_wait(dev, "PM D3->D0", PCIE_RESET_READY_POLL_MS);

}



void pci_reset_secondary_bus(struct pci_dev *dev)