Merge "ARM: dts: msm: Set secondary USB to host mode on SA2150P" (ab016f84) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/arm64/boot/dts/qcom/qcs405-blsp.dtsi

+9 −3

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2018, The Linux Foundation. All rights reserved.
		* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -228,8 +228,14 @@
		qcom,master-id = <86>;
		qcom,use-pinctrl;
		pinctrl-names = "spi_default", "spi_sleep";
		pinctrl-0 = <&spi_2_active>;
		pinctrl-1 = <&spi_2_sleep>;
		pinctrl-0 = <&spi_2_mosi_a1_active
		&spi_2_miso_a1_active
		&spi_2_cs_n_a1_active
		&spi_2_clk_a1_active>;
		pinctrl-1 = <&spi_2_mosi_a1_sleep
		&spi_2_miso_a1_sleep
		&spi_2_cs_n_a1_sleep
		&spi_2_clk_a1_sleep>;
		clock-names = "iface_clk", "core_clk";
		clocks = <&clock_gcc GCC_BLSP1_AHB_CLK>,
		<&clock_gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>;

arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi

+86 −12

Original line number	Diff line number	Diff line
		@@ -302,31 +302,105 @@
		};

		spi_2 {
		spi_2_active: spi_2_active {
		spi_2_mosi_a1_active: spi_2_mosi_a1_active {
		mux {
		pins = "gpio22", "gpio23",
		"gpio24", "gpio25";
		function = "blsp_spi1";
		pins = "gpio22";
		function = "blsp_spi_mosi_a1";
		};

		config {
		pins = "gpio22", "gpio23",
		"gpio24", "gpio25";
		pins = "gpio22";
		drive-strength = <6>;
		bias-disable;
		};
		};

		spi_2_sleep: spi_2_sleep {
		spi_2_mosi_a1_sleep: spi_2_mosi_a1_sleep {
		mux {
		pins = "gpio22", "gpio23",
		"gpio24", "gpio25";
		function = "blsp_spi1";
		pins = "gpio22";
		function = "blsp_spi_mosi_a1";
		};

		config {
		pins = "gpio22", "gpio23",
		"gpio24", "gpio25";
		pins = "gpio22";
		drive-strength = <6>;
		bias-disable;
		};
		};

		spi_2_miso_a1_active: spi_2_miso_a1_active {
		mux {
		pins = "gpio23";
		function = "blsp_spi_miso_a1";
		};

		config {
		pins = "gpio23";
		drive-strength = <6>;
		bias-disable;
		};
		};

		spi_2_miso_a1_sleep: spi_2_miso_a1_sleep {
		mux {
		pins = "gpio23";
		function = "blsp_spi_miso_a1";
		};

		config {
		pins = "gpio23";
		drive-strength = <6>;
		bias-disable;
		};
		};

		spi_2_cs_n_a1_active: spi_2_cs_n_a1_active {
		mux {
		pins = "gpio24";
		function = "blsp_spi_cs_n_a1";
		};

		config {
		pins = "gpio24";
		drive-strength = <6>;
		bias-disable;
		};
		};

		spi_2_cs_n_a1_sleep: spi_2_cs_n_a1_sleep {
		mux {
		pins = "gpio24";
		function = "blsp_spi_cs_n_a1";
		};

		config {
		pins = "gpio24";
		drive-strength = <6>;
		bias-disable;
		};
		};

		spi_2_clk_a1_active: spi_2_clk_a1_active {
		mux {
		pins = "gpio25";
		function = "blsp_spi_clk_a1";
		};

		config {
		pins = "gpio25";
		drive-strength = <6>;
		bias-disable;
		};
		};

		spi_2_clk_a1_sleep: spi_2_clk_a1_sleep {
		mux {
		pins = "gpio25";
		function = "blsp_spi_clk_a1";
		};

		config {
		pins = "gpio25";
		drive-strength = <6>;
		bias-disable;
		};

arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi

+16 −6

Original line number	Diff line number	Diff line
		@@ -69,6 +69,22 @@
		status = "disabled";
		};

		&spi_2 {
		status = "okay";

		can-controller@0 {
		compatible = "qcom,nxp,mpc5746c";
		reg = <0>;
		interrupt-parent = <&tlmm>;
		interrupts = <34 0>;
		spi-max-frequency = <5000000>;
		qcom,clk-freq-mhz = <40000000>;
		qcom,max-can-channels = <2>;
		qcom,bits-per-word = <8>;
		qcom,support-can-fd;
		};
		};

		&spi_6 {
		status = "okay";

		@@ -128,12 +144,6 @@
		};
		};

		&usb3 {
		dwc3@7580000 {
		dr_mode = "otg";
		};
		};

		&usb3_extcon {
		id-gpio = <&tlmm 113 GPIO_ACTIVE_HIGH>;
		};