carl9170: Register maps, tx/rx descriptor formats and eeprom layout

/*

 * Shared Atheros AR9170 Header

 *

 * EEPROM layout

 *

 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; see the file COPYING.  If not, see

 * http://www.gnu.org/licenses/.

 *

 * This file incorporates work covered by the following copyright and

 * permission notice:

 *    Copyright (c) 2007-2008 Atheros Communications, Inc.

 *

 *    Permission to use, copy, modify, and/or distribute this software for any

 *    purpose with or without fee is hereby granted, provided that the above

 *    copyright notice and this permission notice appear in all copies.

 *

 *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

 *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF

 *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR

 *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES

 *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN

 *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF

 *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.

 */

#ifndef __CARL9170_SHARED_EEPROM_H

#define __CARL9170_SHARED_EEPROM_H

#define AR9170_EEPROM_START		0x1600

#define AR5416_MAX_CHAINS		2

#define AR5416_MODAL_SPURS		5

struct ar9170_eeprom_modal {

	__le32	antCtrlChain[AR5416_MAX_CHAINS];

	__le32	antCtrlCommon;

	s8	antennaGainCh[AR5416_MAX_CHAINS];

	u8	switchSettling;

	u8	txRxAttenCh[AR5416_MAX_CHAINS];

	u8	rxTxMarginCh[AR5416_MAX_CHAINS];

	s8	adcDesiredSize;

	s8	pgaDesiredSize;

	u8	xlnaGainCh[AR5416_MAX_CHAINS];

	u8	txEndToXpaOff;

	u8	txEndToRxOn;

	u8	txFrameToXpaOn;

	u8	thresh62;

	s8	noiseFloorThreshCh[AR5416_MAX_CHAINS];

	u8	xpdGain;

	u8	xpd;

	s8	iqCalICh[AR5416_MAX_CHAINS];

	s8	iqCalQCh[AR5416_MAX_CHAINS];

	u8	pdGainOverlap;

	u8	ob;

	u8	db;

	u8	xpaBiasLvl;

	u8	pwrDecreaseFor2Chain;

	u8	pwrDecreaseFor3Chain;

	u8	txFrameToDataStart;

	u8	txFrameToPaOn;

	u8	ht40PowerIncForPdadc;

	u8	bswAtten[AR5416_MAX_CHAINS];

	u8	bswMargin[AR5416_MAX_CHAINS];

	u8	swSettleHt40;

	u8	reserved[22];

	struct spur_channel {

		__le16 spurChan;

		u8	spurRangeLow;

		u8	spurRangeHigh;

	} __packed spur_channels[AR5416_MODAL_SPURS];

} __packed;

#define AR5416_NUM_PD_GAINS		4

#define AR5416_PD_GAIN_ICEPTS		5

struct ar9170_calibration_data_per_freq {

	u8	pwr_pdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];

	u8	vpd_pdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];

} __packed;

#define AR5416_NUM_5G_CAL_PIERS		8

#define AR5416_NUM_2G_CAL_PIERS		4

#define AR5416_NUM_5G_TARGET_PWRS	8

#define AR5416_NUM_2G_CCK_TARGET_PWRS	3

#define AR5416_NUM_2G_OFDM_TARGET_PWRS	4

#define AR5416_MAX_NUM_TGT_PWRS		8

struct ar9170_calibration_target_power_legacy {

	u8	freq;

	u8	power[4];

} __packed;

struct ar9170_calibration_target_power_ht {

	u8	freq;

	u8	power[8];

} __packed;

#define AR5416_NUM_CTLS			24

struct ar9170_calctl_edges {

	u8	channel;

#define AR9170_CALCTL_EDGE_FLAGS	0xC0

	u8	power_flags;

} __packed;

#define AR5416_NUM_BAND_EDGES		8

struct ar9170_calctl_data {

	struct ar9170_calctl_edges

		control_edges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES];

} __packed;

struct ar9170_eeprom {

	__le16	length;

	__le16	checksum;

	__le16	version;

	u8	operating_flags;

#define AR9170_OPFLAG_5GHZ		1

#define AR9170_OPFLAG_2GHZ		2

	u8	misc;

	__le16	reg_domain[2];

	u8	mac_address[6];

	u8	rx_mask;

	u8	tx_mask;

	__le16	rf_silent;

	__le16	bluetooth_options;

	__le16	device_capabilities;

	__le32	build_number;

	u8	deviceType;

	u8	reserved[33];

	u8	customer_data[64];

	struct ar9170_eeprom_modal

		modal_header[2];

	u8	cal_freq_pier_5G[AR5416_NUM_5G_CAL_PIERS];

	u8	cal_freq_pier_2G[AR5416_NUM_2G_CAL_PIERS];

	struct ar9170_calibration_data_per_freq

		cal_pier_data_5G[AR5416_MAX_CHAINS][AR5416_NUM_5G_CAL_PIERS],

		cal_pier_data_2G[AR5416_MAX_CHAINS][AR5416_NUM_2G_CAL_PIERS];

	/* power calibration data */

	struct ar9170_calibration_target_power_legacy

		cal_tgt_pwr_5G[AR5416_NUM_5G_TARGET_PWRS];

	struct ar9170_calibration_target_power_ht

		cal_tgt_pwr_5G_ht20[AR5416_NUM_5G_TARGET_PWRS],

		cal_tgt_pwr_5G_ht40[AR5416_NUM_5G_TARGET_PWRS];

	struct ar9170_calibration_target_power_legacy

		cal_tgt_pwr_2G_cck[AR5416_NUM_2G_CCK_TARGET_PWRS],

		cal_tgt_pwr_2G_ofdm[AR5416_NUM_2G_OFDM_TARGET_PWRS];

	struct ar9170_calibration_target_power_ht

		cal_tgt_pwr_2G_ht20[AR5416_NUM_2G_OFDM_TARGET_PWRS],

		cal_tgt_pwr_2G_ht40[AR5416_NUM_2G_OFDM_TARGET_PWRS];

	/* conformance testing limits */

	u8	ctl_index[AR5416_NUM_CTLS];

	struct ar9170_calctl_data

		ctl_data[AR5416_NUM_CTLS];

	u8	pad;

	__le16	subsystem_id;

} __packed;

#define AR9170_LED_MODE_POWER_ON		0x0001

#define AR9170_LED_MODE_RESERVED		0x0002

#define AR9170_LED_MODE_DISABLE_STATE		0x0004

#define AR9170_LED_MODE_OFF_IN_PSM		0x0008

/* AR9170_LED_MODE BIT is set */

#define AR9170_LED_MODE_FREQUENCY_S		4

#define AR9170_LED_MODE_FREQUENCY		0x0030

#define AR9170_LED_MODE_FREQUENCY_1HZ		0x0000

#define AR9170_LED_MODE_FREQUENCY_0_5HZ		0x0010

#define AR9170_LED_MODE_FREQUENCY_0_25HZ	0x0020

#define AR9170_LED_MODE_FREQUENCY_0_125HZ	0x0030

/* AR9170_LED_MODE BIT is not set */

#define AR9170_LED_MODE_CONN_STATE_S		4

#define AR9170_LED_MODE_CONN_STATE		0x0030

#define AR9170_LED_MODE_CONN_STATE_FORCE_OFF	0x0000

#define AR9170_LED_MODE_CONN_STATE_FORCE_ON	0x0010

/* Idle off / Active on */

#define AR9170_LED_MODE_CONN_STATE_IOFF_AON	0x0020

/* Idle on / Active off */

#define AR9170_LED_MODE_CONN_STATE_ION_AOFF	0x0010

#define AR9170_LED_MODE_MODE			0x0040

#define AR9170_LED_MODE_RESERVED2		0x0080

#define AR9170_LED_MODE_TON_SCAN_S		8

#define AR9170_LED_MODE_TON_SCAN		0x0f00

#define AR9170_LED_MODE_TOFF_SCAN_S		12

#define AR9170_LED_MODE_TOFF_SCAN		0xf000

struct ar9170_led_mode {

	__le16 led;

};

#endif /* __CARL9170_SHARED_EEPROM_H */

/*

 * Shared Atheros AR9170 Header

 *

 * Firmware command interface definitions

 *

 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>

 * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; see the file COPYING.  If not, see

 * http://www.gnu.org/licenses/.

 *

 * This file incorporates work covered by the following copyright and

 * permission notice:

 *    Copyright (c) 2007-2008 Atheros Communications, Inc.

 *

 *    Permission to use, copy, modify, and/or distribute this software for any

 *    purpose with or without fee is hereby granted, provided that the above

 *    copyright notice and this permission notice appear in all copies.

 *

 *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

 *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF

 *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR

 *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES

 *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN

 *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF

 *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.

 */

#ifndef __CARL9170_SHARED_FWCMD_H

#define __CARL9170_SHARED_FWCMD_H

#define	CARL9170_MAX_CMD_LEN		64

#define	CARL9170_MAX_CMD_PAYLOAD_LEN	60

#define CARL9170FW_API_MIN_VER		1

#define CARL9170FW_API_MAX_VER		1

enum carl9170_cmd_oids {

	CARL9170_CMD_RREG		= 0x00,

	CARL9170_CMD_WREG		= 0x01,

	CARL9170_CMD_ECHO		= 0x02,

	CARL9170_CMD_SWRST		= 0x03,

	CARL9170_CMD_REBOOT		= 0x04,

	CARL9170_CMD_BCN_CTRL		= 0x05,

	CARL9170_CMD_READ_TSF		= 0x06,

	/* CAM */

	CARL9170_CMD_EKEY		= 0x10,

	CARL9170_CMD_DKEY		= 0x11,

	/* RF / PHY */

	CARL9170_CMD_FREQUENCY		= 0x20,

	CARL9170_CMD_RF_INIT		= 0x21,

	CARL9170_CMD_SYNTH		= 0x22,

	CARL9170_CMD_FREQ_START		= 0x23,

	CARL9170_CMD_PSM		= 0x24,

	/* Asychronous command flag */

	CARL9170_CMD_ASYNC_FLAG		= 0x40,

	CARL9170_CMD_WREG_ASYNC		= (CARL9170_CMD_WREG |

					   CARL9170_CMD_ASYNC_FLAG),

	CARL9170_CMD_REBOOT_ASYNC	= (CARL9170_CMD_REBOOT |

					   CARL9170_CMD_ASYNC_FLAG),

	CARL9170_CMD_BCN_CTRL_ASYNC	= (CARL9170_CMD_BCN_CTRL |

					   CARL9170_CMD_ASYNC_FLAG),

	CARL9170_CMD_PSM_ASYNC		= (CARL9170_CMD_PSM |

					   CARL9170_CMD_ASYNC_FLAG),

	/* responses and traps */

	CARL9170_RSP_FLAG		= 0xc0,

	CARL9170_RSP_PRETBTT		= 0xc0,

	CARL9170_RSP_TXCOMP		= 0xc1,

	CARL9170_RSP_BEACON_CONFIG	= 0xc2,

	CARL9170_RSP_ATIM		= 0xc3,

	CARL9170_RSP_WATCHDOG		= 0xc6,

	CARL9170_RSP_TEXT		= 0xca,

	CARL9170_RSP_HEXDUMP		= 0xcc,

	CARL9170_RSP_RADAR		= 0xcd,

	CARL9170_RSP_GPIO		= 0xce,

	CARL9170_RSP_BOOT		= 0xcf,

};

struct carl9170_set_key_cmd {

	__le16		user;

	__le16		keyId;

	__le16		type;

	u8		macAddr[6];

	u32		key[4];

} __packed;

#define CARL9170_SET_KEY_CMD_SIZE		28

struct carl9170_disable_key_cmd {

	__le16		user;

	__le16		padding;

} __packed;

#define CARL9170_DISABLE_KEY_CMD_SIZE		4

struct carl9170_u32_list {

	u32	vals[0];

} __packed;

struct carl9170_reg_list {

	__le32		regs[0];

} __packed;

struct carl9170_write_reg {

	struct {

		__le32		addr;

		__le32		val;

	} regs[0] __packed;

} __packed;

#define	CARL9170FW_PHY_HT_ENABLE		0x4

#define	CARL9170FW_PHY_HT_DYN2040		0x8

#define	CARL9170FW_PHY_HT_EXT_CHAN_OFF		0x3

#define	CARL9170FW_PHY_HT_EXT_CHAN_OFF_S	2

struct carl9170_rf_init {

	__le32		freq;

	u8		ht_settings;

	u8		padding2[3];

	__le32		delta_slope_coeff_exp;

	__le32		delta_slope_coeff_man;

	__le32		delta_slope_coeff_exp_shgi;

	__le32		delta_slope_coeff_man_shgi;

	__le32		finiteLoopCount;

} __packed;

#define CARL9170_RF_INIT_SIZE		28

struct carl9170_rf_init_result {

	__le32		ret;		/* AR9170_PHY_REG_AGC_CONTROL */

} __packed;

#define	CARL9170_RF_INIT_RESULT_SIZE	4

#define	CARL9170_PSM_SLEEP		0x1000

#define	CARL9170_PSM_SOFTWARE		0

#define	CARL9170_PSM_WAKE		0 /* internally used. */

#define	CARL9170_PSM_COUNTER		0xfff

#define	CARL9170_PSM_COUNTER_S		0

struct carl9170_psm {

	__le32		state;

} __packed;

#define CARL9170_PSM_SIZE		4

struct carl9170_bcn_ctrl_cmd {

	__le32		vif_id;

	__le32		mode;

	__le32		bcn_addr;

	__le32		bcn_len;

} __packed;

#define CARL9170_BCN_CTRL_CMD_SIZE	16

#define CARL9170_BCN_CTRL_DRAIN	0

#define CARL9170_BCN_CTRL_CAB_TRIGGER	1

struct carl9170_cmd_head {

	union {

		struct {

			u8	len;

			u8	cmd;

			u8	seq;

			u8	ext;

		} __packed;

		u32 hdr_data;

	} __packed;

} __packed;

struct carl9170_cmd {

	struct carl9170_cmd_head hdr;

	union {

		struct carl9170_set_key_cmd	setkey;

		struct carl9170_disable_key_cmd	disablekey;

		struct carl9170_u32_list	echo;

		struct carl9170_reg_list	rreg;

		struct carl9170_write_reg	wreg;

		struct carl9170_rf_init		rf_init;

		struct carl9170_psm		psm;

		struct carl9170_bcn_ctrl_cmd	bcn_ctrl;

		u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];

	} __packed;

} __packed;

#define	CARL9170_TX_STATUS_QUEUE	3

#define	CARL9170_TX_STATUS_QUEUE_S	0

#define	CARL9170_TX_STATUS_RIX_S	2

#define	CARL9170_TX_STATUS_RIX		(3 << CARL9170_TX_STATUS_RIX_S)

#define	CARL9170_TX_STATUS_TRIES_S	4

#define	CARL9170_TX_STATUS_TRIES	(7 << CARL9170_TX_STATUS_TRIES_S)

#define	CARL9170_TX_STATUS_SUCCESS	0x80

/*

 * NOTE:

 * Both structs [carl9170_tx_status and _carl9170_tx_status]

 * need to be "bit for bit" in sync.

 */

struct carl9170_tx_status {

	/*

	 * Beware of compiler bugs in all gcc pre 4.4!

	 */

	u8 cookie;

	u8 queue:2;

	u8 rix:2;

	u8 tries:3;

	u8 success:1;

} __packed;

struct _carl9170_tx_status {

	/*

	 * This version should be immune to all alignment bugs.

	 */

	u8 cookie;

	u8 info;

} __packed;

#define CARL9170_TX_STATUS_SIZE		2

#define	CARL9170_RSP_TX_STATUS_NUM	(CARL9170_MAX_CMD_PAYLOAD_LEN /	\

					 sizeof(struct _carl9170_tx_status))

#define	CARL9170_TX_MAX_RATE_TRIES	7

#define	CARL9170_TX_MAX_RATES		4

#define	CARL9170_TX_MAX_RETRY_RATES	(CARL9170_TX_MAX_RATES - 1)

#define	CARL9170_ERR_MAGIC		"ERR:"

#define	CARL9170_BUG_MAGIC		"BUG:"

struct carl9170_gpio {

	__le32 gpio;

} __packed;

#define CARL9170_GPIO_SIZE		4

struct carl9170_tsf_rsp {

	union {

		__le32 tsf[2];

		__le64 tsf_64;

	} __packed;

} __packed;

#define CARL9170_TSF_RSP_SIZE		8

struct carl9170_rsp {

	struct carl9170_cmd_head hdr;

	union {

		struct carl9170_rf_init_result	rf_init_res;

		struct carl9170_u32_list	rreg_res;

		struct carl9170_u32_list	echo;

		struct carl9170_tx_status	tx_status[0];

		struct _carl9170_tx_status	_tx_status[0];

		struct carl9170_gpio		gpio;

		struct carl9170_tsf_rsp		tsf;

		struct carl9170_psm		psm;

		u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];

	} __packed;

} __packed;

#endif /* __CARL9170_SHARED_FWCMD_H */

/*

 * Shared CARL9170 Header

 *

 * Firmware descriptor format

 *

 * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; see the file COPYING.  If not, see

 * http://www.gnu.org/licenses/.

 */

#ifndef __CARL9170_SHARED_FWDESC_H

#define __CARL9170_SHARED_FWDESC_H

/* NOTE: Don't mess with the order of the flags! */

enum carl9170fw_feature_list {

	/* Always set */

	CARL9170FW_DUMMY_FEATURE,

	/*

	 * Indicates that this image has special boot block which prevents

	 * legacy drivers to drive the firmware.

	 */

	CARL9170FW_MINIBOOT,

	/* usb registers are initialized by the firmware */

	CARL9170FW_USB_INIT_FIRMWARE,

	/* command traps & notifications are send through EP2 */

	CARL9170FW_USB_RESP_EP2,

	/* usb download (app -> fw) stream */

	CARL9170FW_USB_DOWN_STREAM,

	/* usb upload (fw -> app) stream */

	CARL9170FW_USB_UP_STREAM,

	/* unusable - reserved to flag non-functional debug firmwares */

	CARL9170FW_UNUSABLE,

	/* AR9170_CMD_RF_INIT, AR9170_CMD_FREQ_START, AR9170_CMD_FREQUENCY */

	CARL9170FW_COMMAND_PHY,

	/* AR9170_CMD_EKEY, AR9170_CMD_DKEY */

	CARL9170FW_COMMAND_CAM,

	/* Firmware has a software Content After Beacon Queueing mechanism */

	CARL9170FW_WLANTX_CAB,

	/* The firmware is capable of responding to incoming BAR frames */

	CARL9170FW_HANDLE_BACK_REQ,

	/* GPIO Interrupt | CARL9170_RSP_GPIO */

	CARL9170FW_GPIO_INTERRUPT,

	/* Firmware PSM support | CARL9170_CMD_PSM */

	CARL9170FW_PSM,

	/* KEEP LAST */

	__CARL9170FW_FEATURE_NUM

};

#define OTUS_MAGIC	"OTAR"

#define MOTD_MAGIC	"MOTD"

#define FIX_MAGIC	"FIX\0"

#define DBG_MAGIC	"DBG\0"

#define CHK_MAGIC	"CHK\0"

#define LAST_MAGIC	"LAST"

#define CARL9170FW_SET_DAY(d) (((d) - 1) % 31)

#define CARL9170FW_SET_MONTH(m) ((((m) - 1) % 12) * 31)

#define CARL9170FW_SET_YEAR(y) (((y) - 10) * 372)

#define CARL9170FW_GET_DAY(d) (((d) % 31) + 1)

#define CARL9170FW_GET_MONTH(m) ((((m) / 31) % 12) + 1)

#define CARL9170FW_GET_YEAR(y) ((y) / 372 + 10)

struct carl9170fw_desc_head {

	u8	magic[4];

	__le16 length;

	u8 min_ver;

	u8 cur_ver;

} __packed;

#define CARL9170FW_DESC_HEAD_SIZE			\

	(sizeof(struct carl9170fw_desc_head))

#define CARL9170FW_OTUS_DESC_MIN_VER		6

#define CARL9170FW_OTUS_DESC_CUR_VER		6

struct carl9170fw_otus_desc {

	struct carl9170fw_desc_head head;

	__le32 feature_set;

	__le32 fw_address;

	__le32 bcn_addr;

	__le16 bcn_len;

	__le16 miniboot_size;

	__le16 tx_frag_len;

	__le16 rx_max_frame_len;

	u8 tx_descs;

	u8 cmd_bufs;

	u8 api_ver;

	u8 vif_num;

} __packed;

#define CARL9170FW_OTUS_DESC_SIZE			\

	(sizeof(struct carl9170fw_otus_desc))

#define CARL9170FW_MOTD_STRING_LEN			24

#define CARL9170FW_MOTD_RELEASE_LEN			20

#define CARL9170FW_MOTD_DESC_MIN_VER			1

#define CARL9170FW_MOTD_DESC_CUR_VER			2

struct carl9170fw_motd_desc {

	struct carl9170fw_desc_head head;

	__le32 fw_year_month_day;

	char desc[CARL9170FW_MOTD_STRING_LEN];

	char release[CARL9170FW_MOTD_RELEASE_LEN];

} __packed;

#define CARL9170FW_MOTD_DESC_SIZE			\

	(sizeof(struct carl9170fw_motd_desc))

#define CARL9170FW_FIX_DESC_MIN_VER			1

#define CARL9170FW_FIX_DESC_CUR_VER			2

struct carl9170fw_fix_entry {

	__le32 address;

	__le32 mask;

	__le32 value;

} __packed;

struct carl9170fw_fix_desc {

	struct carl9170fw_desc_head head;

	struct carl9170fw_fix_entry data[0];

} __packed;

#define CARL9170FW_FIX_DESC_SIZE			\

	(sizeof(struct carl9170fw_fix_desc))

#define CARL9170FW_DBG_DESC_MIN_VER			1

#define CARL9170FW_DBG_DESC_CUR_VER			2

struct carl9170fw_dbg_desc {

	struct carl9170fw_desc_head head;

	__le32 bogoclock_addr;

	__le32 counter_addr;

	__le32 rx_total_addr;

	__le32 rx_overrun_addr;

	/* Put your debugging definitions here */

} __packed;

#define CARL9170FW_DBG_DESC_SIZE			\

	(sizeof(struct carl9170fw_dbg_desc))

#define CARL9170FW_CHK_DESC_MIN_VER			1

#define CARL9170FW_CHK_DESC_CUR_VER			2

struct carl9170fw_chk_desc {

	struct carl9170fw_desc_head head;

	__le32 fw_crc32;

	__le32 hdr_crc32;

} __packed;

#define CARL9170FW_CHK_DESC_SIZE			\

	(sizeof(struct carl9170fw_chk_desc))

#define CARL9170FW_LAST_DESC_MIN_VER			1

#define CARL9170FW_LAST_DESC_CUR_VER			2

struct carl9170fw_last_desc {

	struct carl9170fw_desc_head head;

} __packed;

#define CARL9170FW_LAST_DESC_SIZE			\

	(sizeof(struct carl9170fw_fix_desc))

#define CARL9170FW_DESC_MAX_LENGTH			8192

#define CARL9170FW_FILL_DESC(_magic, _length, _min_ver, _cur_ver)	\

	.head = {							\

		.magic = _magic,					\

		.length = cpu_to_le16(_length),				\

		.min_ver = _min_ver,					\

		.cur_ver = _cur_ver,					\

	}

static inline void carl9170fw_fill_desc(struct carl9170fw_desc_head *head,

					 u8 magic[4], __le16 length,

					 u8 min_ver, u8 cur_ver)

{

	head->magic[0] = magic[0];

	head->magic[1] = magic[1];

	head->magic[2] = magic[2];

	head->magic[3] = magic[3];

	head->length = length;

	head->min_ver = min_ver;

	head->cur_ver = cur_ver;

}

#define carl9170fw_for_each_hdr(desc, fw_desc)				\

	for (desc = fw_desc;						\

	     memcmp(desc->magic, LAST_MAGIC, 4) &&			\

	     le16_to_cpu(desc->length) >= CARL9170FW_DESC_HEAD_SIZE &&	\

	     le16_to_cpu(desc->length) < CARL9170FW_DESC_MAX_LENGTH;	\

	     desc = (void *)((unsigned long)desc + le16_to_cpu(desc->length)))

#define CHECK_HDR_VERSION(head, _min_ver)				\

	(((head)->cur_ver < _min_ver) || ((head)->min_ver > _min_ver))	\

static inline bool carl9170fw_supports(__le32 list, u8 feature)

{

	return le32_to_cpu(list) & BIT(feature);

}

static inline bool carl9170fw_desc_cmp(const struct carl9170fw_desc_head *head,

				       const u8 descid[4], u16 min_len,

				       u8 compatible_revision)

{

	if (descid[0] == head->magic[0] && descid[1] == head->magic[1] &&

	    descid[2] == head->magic[2] && descid[3] == head->magic[3] &&

	    !CHECK_HDR_VERSION(head, compatible_revision) &&

	    (le16_to_cpu(head->length) >= min_len))

		return true;

	return false;

}

#define CARL9170FW_MIN_SIZE	32

#define CARL9170FW_MAX_SIZE	16384

static inline bool carl9170fw_size_check(unsigned int len)

{

	return (len <= CARL9170FW_MAX_SIZE && len >= CARL9170FW_MIN_SIZE);

}

#endif /* __CARL9170_SHARED_FWDESC_H */