Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aa7ed01f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Support for MMC power sequences.
   - SDIO function devicetree subnode parsing.
   - Refactor the hardware reset routines and enable it for SD cards.
   - Various code quality improvements, especially for slot-gpio.

  MMC host:
   - dw_mmc: Various fixes and cleanups.
   - dw_mmc: Convert to mmc_send_tuning().
   - moxart: Fix probe logic.
   - sdhci: Various fixes and cleanups
   - sdhci: Asynchronous request handling support.
   - sdhci-pxav3: Various fixes and cleanups.
   - sdhci-tegra: Fixes for T114, T124 and T132.
   - rtsx: Various fixes and cleanups.
   - rtsx: Support for SDIO.
   - sdhi/tmio: Refactor and cleanup of header files.
   - omap_hsmmc: Use slot-gpio and common MMC DT parser.
   - Make all hosts to deal with errors from mmc_of_parse().
   - sunxi: Various fixes and cleanups.
   - sdhci: Support for Fujitsu SDHCI controller f_sdh30"

* tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmc: (117 commits)
  mmc: sdhci-s3c: solve problem with sleeping in atomic context
  mmc: pwrseq: add driver for emmc hardware reset
  mmc: moxart: fix probe logic
  mmc: core: Invoke mmc_pwrseq_post_power_on() prior MMC_POWER_ON state
  mmc: pwrseq_simple: Add optional reference clock support
  mmc: pwrseq: Document optional clock for the simple power sequence
  mmc: pwrseq_simple: Extend to support more pins
  mmc: pwrseq: Document that simple sequence support more than one GPIO
  mmc: Add hardware dependencies for sdhci-pxav3 and sdhci-pxav2
  mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes
  mmc: sdhci-pxav3: Extend binding with SDIO3 conf reg for the Armada 38x
  mmc: sdhci-pxav3: Fix Armada 38x controller's caps according to erratum ERR-7878951
  mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor
  mmc: sdhci: switch voltage before sdhci_set_ios in runtime resume
  mmc: tegra: Write xfer_mode, CMD regs in together
  mmc: Resolve BKOPS compatability issue
  mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles
  mmc: dw_mmc: rockchip: remove incorrect __exit_p()
  mmc: dw_mmc: exynos: remove incorrect __exit_p()
  mmc: Fix menuconfig alignment of MMC_SDHCI_* options
  ...
parents 7796c11c 017210d1
Loading
Loading
Loading
Loading
+25 −0
Original line number Diff line number Diff line
* The simple eMMC hardware reset provider

The purpose of this driver is to perform standard eMMC hw reset
procedure, as descibed by Jedec 4.4 specification. This procedure is
performed just after MMC core enabled power to the given mmc host (to
fix possible issues if bootloader has left eMMC card in initialized or
unknown state), and before performing complete system reboot (also in
case of emergency reboot call). The latter is needed on boards, which
doesn't have hardware reset logic connected to emmc card and (limited or
broken) ROM bootloaders are unable to read second stage from the emmc
card if the card is left in unknown or already initialized state.

Required properties:
- compatible : contains "mmc-pwrseq-emmc".
- reset-gpios : contains a GPIO specifier. The reset GPIO is asserted
	and then deasserted to perform eMMC card reset. To perform
	reset procedure as described in Jedec 4.4 specification, the
	gpio line should be defined as GPIO_ACTIVE_LOW.

Example:

	sdhci0_pwrseq {
		compatible = "mmc-pwrseq-emmc";
		reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
	}
+25 −0
Original line number Diff line number Diff line
* The simple MMC power sequence provider

The purpose of the simple MMC power sequence provider is to supports a set of
common properties between various SOC designs. It thus enables us to use the
same provider for several SOC designs.

Required properties:
- compatible : contains "mmc-pwrseq-simple".

Optional properties:
- reset-gpios : contains a list of GPIO specifiers. The reset GPIOs are asserted
	at initialization and prior we start the power up procedure of the card.
	They will be de-asserted right after the power has been provided to the
	card.
- clocks : Must contain an entry for the entry in clock-names.
  See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entry:
  "ext_clock" (External clock provided to the card).

Example:

	sdhci0_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio1 12 0>;
	}
+61 −1
Original line number Diff line number Diff line
@@ -64,7 +64,43 @@ Optional SDIO properties:
- keep-power-in-suspend: Preserves card power during a suspend/resume cycle
- enable-sdio-wakeup: Enables wake up of host system on SDIO IRQ assertion

Example:

MMC power sequences:
--------------------

System on chip designs may specify a specific MMC power sequence. To
successfully detect an (e)MMC/SD/SDIO card, that power sequence must be
maintained while initializing the card.

Optional property:
- mmc-pwrseq: phandle to the MMC power sequence node. See "mmc-pwrseq-*"
	for documentation of MMC power sequence bindings.


Use of Function subnodes
------------------------

On embedded systems the cards connected to a host may need additional
properties. These can be specified in subnodes to the host controller node.
The subnodes are identified by the standard 'reg' property.
Which information exactly can be specified depends on the bindings for the
SDIO function driver for the subnode, as specified by the compatible string.

Required host node properties when using function subnodes:
- #address-cells: should be one. The cell is the slot id.
- #size-cells: should be zero.

Required function subnode properties:
- compatible: name of SDIO function following generic names recommended practice
- reg: Must contain the SDIO function number of the function this subnode
       describes. A value of 0 denotes the memory SD function, values from
       1 to 7 denote the SDIO functions.


Examples
--------

Basic example:

sdhci@ab000000 {
	compatible = "sdhci";
@@ -77,4 +113,28 @@ sdhci@ab000000 {
	max-frequency = <50000000>;
	keep-power-in-suspend;
	enable-sdio-wakeup;
	mmc-pwrseq = <&sdhci0_pwrseq>
}

Example with sdio function subnode:

mmc3: mmc@01c12000 {
	#address-cells = <1>;
	#size-cells = <0>;

	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins_a>;
	vmmc-supply = <&reg_vmmc3>;
	bus-width = <4>;
	non-removable;
	mmc-pwrseq = <&sdhci0_pwrseq>
	status = "okay";

	brcmf: bcrmf@1 {
		reg = <1>;
		compatible = "brcm,bcm43xx-fmac";
		interrupt-parent = <&pio>;
		interrupts = <10 8>; /* PH10 / EINT10 */
		interrupt-names = "host-wake";
	};
};
+30 −0
Original line number Diff line number Diff line
* Fujitsu SDHCI controller

This file documents differences between the core properties in mmc.txt
and the properties used by the sdhci_f_sdh30 driver.

Required properties:
- compatible: "fujitsu,mb86s70-sdhci-3.0"
- clocks: Must contain an entry for each entry in clock-names. It is a
  list of phandles and clock-specifier pairs.
  See ../clocks/clock-bindings.txt for details.
- clock-names: Should contain the following two entries:
	"iface" - clock used for sdhci interface
	"core"  - core clock for sdhci controller

Optional properties:
- vqmmc-supply: phandle to the regulator device tree node, mentioned
  as the VCCQ/VDD_IO supply in the eMMC/SD specs.

Example:

	sdhci1: mmc@36600000 {
		compatible = "fujitsu,mb86s70-sdhci-3.0";
		reg = <0 0x36600000 0x1000>;
		interrupts = <0 172 0x4>,
			     <0 173 0x4>;
		bus-width = <4>;
		vqmmc-supply = <&vccq_sdhci1>;
		clocks = <&clock 2 2 0>, <&clock 2 3 0>;
		clock-names = "iface", "core";
	};
+11 −4
Original line number Diff line number Diff line
@@ -9,9 +9,13 @@ Required properties:
- reg:
  * for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for
    the SDHCI registers.
  * for "marvell,armada-380-sdhci", two register areas. The first one
    for the SDHCI registers themselves, and the second one for the
    AXI/Mbus bridge registers of the SDHCI unit.

  * for "marvell,armada-380-sdhci", three register areas. The first
    one for the SDHCI registers themselves, the second one for the
    AXI/Mbus bridge registers of the SDHCI unit, the third one for the
    SDIO3 Configuration register
- reg names: should be "sdhci", "mbus", "conf-sdio3". only mandatory
  for "marvell,armada-380-sdhci"
- clocks: Array of clocks required for SDHCI; requires at least one for
    I/O clock.
- clock-names: Array of names corresponding to clocks property; shall be
@@ -35,7 +39,10 @@ sdhci@d4280800 {

sdhci@d8000 {
	compatible = "marvell,armada-380-sdhci";
	reg = <0xd8000 0x1000>, <0xdc000 0x100>;
	reg-names = "sdhci", "mbus", "conf-sdio3";
	reg = <0xd8000 0x1000>,
		<0xdc000 0x100>;
		<0x18454 0x4>;
	interrupts = <0 25 0x4>;
	clocks = <&gateclk 17>;
	clock-names = "io";
Loading