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Commit a9f5ecbb authored by Tharun Kumar Merugu's avatar Tharun Kumar Merugu
Browse files

ARM: dts: msm: Disable IO Cohernecy in trinket fastRPC DT entries 



Hardware does not support SMMU IO coherency. Remove
dma-coherent property from fastRPC context bank DT entries.

Change-Id: I1943c7b1ddb83c2df8be8e4410c6b0b836b4810a
Acked-by: default avatarVishnu Karthik D <vikarthi@qti.qualcomm.com>
Signed-off-by: default avatarMohammed Nayeem Ur Rahman <mohara@codeaurora.org>
Signed-off-by: default avatarTharun Kumar Merugu <mtharu@codeaurora.org>
parent 0abc9ea7

arch/arm64/boot/dts/qcom/trinket.dtsi

+0 −8
Original line number Diff line number Diff line
@@ -1444,42 +1444,36 @@ 
			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0C01 0x0>;

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb2 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0C02 0x0>;

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb3 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0C03 0x0>;

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb4 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0C04 0x0>;

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb5 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0C05 0x0>;

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb6 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0C06 0x0>;

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb9 {
@@ -1487,7 +1481,6 @@ 
			label = "cdsprpc-smd";

			qcom,secure-context-bank;

			iommus = <&apps_smmu 0x0C09 0x0>;

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb10 {
@@ -1497,7 +1490,6 @@ 
				 <&apps_smmu 0x0044 0x0>;

			shared-sid = <2>;

			shared-cb  = <5>;

			dma-coherent;

		};

	};