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Commit a9ab43fa authored by Anirudh Ghayal's avatar Anirudh Ghayal
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power: qpnp-qg: Add a DT property to use S7 PON OCV



PMI632 PON OCV is dependent on the primary PMIC it is
paired with. Add a DT property to force using S7 based
OCV instead of the multi-level PON OCV logic.

Change-Id: I3846276646e933c4c893b7325bf70ea2455dc891
Signed-off-by: default avatarAnirudh Ghayal <aghayal@codeaurora.org>
parent 17eb0120
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+5 −0
Original line number Diff line number Diff line
@@ -337,6 +337,11 @@ First Level Node - QGAUGE device
		    for the shutdown SOC to be used. If the difference is
		    beyond this value the PON SOC is used.

- qcom,qg-use-s7-ocv
	Usage:      optional
	Value type: <bool>
	Definition: Boolean property to use S7 for PON OCV.

==========================================================
Second Level Nodes - Peripherals managed by QGAUGE driver
==========================================================
+1 −0
Original line number Diff line number Diff line
@@ -64,6 +64,7 @@ struct qg_dt {
	bool			esr_disable;
	bool			esr_discharge_enable;
	bool			qg_ext_sense;
	bool			use_s7_ocv;
};

struct qg_esr_data {
+5 −1
Original line number Diff line number Diff line
@@ -2886,7 +2886,9 @@ static int qg_set_wa_flags(struct qpnp_qg *chip)
{
	switch (chip->pmic_rev_id->pmic_subtype) {
	case PMI632_SUBTYPE:
		chip->wa_flags |= QG_RECHARGE_SOC_WA | QG_PON_OCV_WA;
		chip->wa_flags |= QG_RECHARGE_SOC_WA;
		if (!chip->dt.use_s7_ocv)
			chip->wa_flags |= QG_PON_OCV_WA;
		if (chip->pmic_rev_id->rev4 == PMI632_V1P0_REV4)
			chip->wa_flags |= QG_VBAT_LOW_WA;
		break;
@@ -3557,6 +3559,8 @@ static int qg_parse_dt(struct qpnp_qg *chip)

	chip->dt.qg_ext_sense = of_property_read_bool(node, "qcom,qg-ext-sns");

	chip->dt.use_s7_ocv = of_property_read_bool(node, "qcom,qg-use-s7-ocv");

	/* Capacity learning params*/
	if (!chip->dt.cl_disable) {
		chip->dt.cl_feedback_on = of_property_read_bool(node,