Loading arch/arm64/boot/dts/qcom/sm8150-sdx50m.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -84,3 +84,23 @@ qcom,mhi-erdb-base = <0x40300700>; }; }; &reserved_memory { pil_buffer_p2_mem: pil_buffer_p2_region@a0000000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0xa0000000 0x0 0x01000000>; }; pil_buffer_p1_mem: pil_buffer_p1_region@0a1000000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0xa1000000 0x0 0x02c00000>; }; pil_pcie_mem: pil_pcie_mem_region@a3c00000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0xa3c00000 0x0 0x01000000>; }; }; arch/arm64/boot/dts/qcom/sm8150.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -583,7 +583,7 @@ }; }; reserved-memory { reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; Loading Loading
arch/arm64/boot/dts/qcom/sm8150-sdx50m.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -84,3 +84,23 @@ qcom,mhi-erdb-base = <0x40300700>; }; }; &reserved_memory { pil_buffer_p2_mem: pil_buffer_p2_region@a0000000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0xa0000000 0x0 0x01000000>; }; pil_buffer_p1_mem: pil_buffer_p1_region@0a1000000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0xa1000000 0x0 0x02c00000>; }; pil_pcie_mem: pil_pcie_mem_region@a3c00000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0xa3c00000 0x0 0x01000000>; }; };
arch/arm64/boot/dts/qcom/sm8150.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -583,7 +583,7 @@ }; }; reserved-memory { reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; Loading