Loading arch/arm64/boot/dts/qcom/msm-arm-smmu-sdmshrike.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -35,16 +35,16 @@ #size-cells = <1>; #address-cells = <1>; ranges; interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>; gfx_0_tbu: gfx_0_tbu@0x2CC5000 { compatible = "qcom,qsmmuv500-tbu"; Loading Loading
arch/arm64/boot/dts/qcom/msm-arm-smmu-sdmshrike.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -35,16 +35,16 @@ #size-cells = <1>; #address-cells = <1>; ranges; interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>; gfx_0_tbu: gfx_0_tbu@0x2CC5000 { compatible = "qcom,qsmmuv500-tbu"; Loading