clk: qcom: Add support for gpll6_out_main and gpll8_out_main for SM6150.

Sdcc1_apps_clk requires gpll6_out_main to derive 384MHz. Sdcc2_apps_clk
clock requires gpll8_out_main as source to derive 202MHz, so add support
for the same.

Change-Id: I5298df0f7fa1d0ab3bd0aab29bef6db155df4014
Signed-off-by: Diptanshu Jamgade <djamgade@codeaurora.org>