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Commit a61bfa65 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'xgene-next'



Keyur Chudgar says:

====================
drivers: net: xgene: Add second SGMII based 1G interface

This patch adds support for second SGMII based 1G interface.
====================

Signed-off-by: default avatarKeyur Chudgar <kchudgar@apm.com>
Signed-off-by: default avatarIyappan Subramanian <isubramanian@apm.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e7a9eee5 ca626454
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+2 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ Required properties for all the ethernet interfaces:
  - "ring_csr": Descriptor ring control and status register address space
  - "ring_cmd": Descriptor ring command register address space
- interrupts: Ethernet main interrupt
- port-id: Port number (0 or 1)
- clocks: Reference to the clock entry.
- local-mac-address: MAC address assigned to this device
- phy-connection-type: Interface type between ethernet device and PHY device
@@ -49,6 +50,7 @@ Example:
		      <0x0 0X10000000 0x0 0X200>;
		reg-names = "enet_csr", "ring_csr", "ring_cmd";
		interrupts = <0x0 0x3c 0x4>;
		port-id = <0>;
		clocks = <&menetclk 0>;
		local-mac-address = [00 01 73 00 00 01];
		phy-connection-type = "rgmii";
+4 −0
Original line number Diff line number Diff line
@@ -45,6 +45,10 @@
	status = "ok";
};

&sgenet1 {
	status = "ok";
};

&xgenet {
	status = "ok";
};
+25 −0
Original line number Diff line number Diff line
@@ -186,6 +186,16 @@
				clock-output-names = "sge0clk";
			};

			sge1clk: sge1clk@1f21c000 {
				compatible = "apm,xgene-device-clock";
				#clock-cells = <1>;
				clocks = <&socplldiv2 0>;
				reg = <0x0 0x1f21c000 0x0 0x1000>;
				reg-names = "csr-reg";
				csr-mask = <0xc>;
				clock-output-names = "sge1clk";
			};

			xge0clk: xge0clk@1f61c000 {
				compatible = "apm,xgene-device-clock";
				#clock-cells = <1>;
@@ -635,6 +645,21 @@
			phy-connection-type = "sgmii";
		};

		sgenet1: ethernet@1f210030 {
			compatible = "apm,xgene1-sgenet";
			status = "disabled";
			reg = <0x0 0x1f210030 0x0 0xd100>,
			      <0x0 0x1f200000 0x0 0Xc300>,
			      <0x0 0x1B000000 0x0 0X8000>;
			reg-names = "enet_csr", "ring_csr", "ring_cmd";
			interrupts = <0x0 0xAC 0x4>;
			port-id = <1>;
			dma-coherent;
			clocks = <&sge1clk 0>;
			local-mac-address = [00 00 00 00 00 00];
			phy-connection-type = "sgmii";
		};

		xgenet: ethernet@1f610000 {
			compatible = "apm,xgene1-xgenet";
			status = "disabled";
+2 −0
Original line number Diff line number Diff line
@@ -97,6 +97,8 @@ enum xgene_enet_rm {
#define QCOHERENT		BIT(4)
#define RECOMBBUF		BIT(27)

#define MAC_OFFSET			0x30

#define BLOCK_ETH_CSR_OFFSET		0x2000
#define BLOCK_ETH_RING_IF_OFFSET	0x9000
#define BLOCK_ETH_DIAG_CSR_OFFSET	0xD000
+45 −5
Original line number Diff line number Diff line
@@ -645,9 +645,11 @@ static int xgene_enet_create_desc_rings(struct net_device *ndev)
	struct device *dev = ndev_to_dev(ndev);
	struct xgene_enet_desc_ring *rx_ring, *tx_ring, *cp_ring;
	struct xgene_enet_desc_ring *buf_pool = NULL;
	u8 cpu_bufnum = 0, eth_bufnum = START_ETH_BUFNUM;
	u8 bp_bufnum = START_BP_BUFNUM;
	u16 ring_id, ring_num = START_RING_NUM;
	u8 cpu_bufnum = pdata->cpu_bufnum;
	u8 eth_bufnum = pdata->eth_bufnum;
	u8 bp_bufnum = pdata->bp_bufnum;
	u16 ring_num = pdata->ring_num;
	u16 ring_id;
	int ret;

	/* allocate rx descriptor ring */
@@ -752,6 +754,22 @@ static const struct net_device_ops xgene_ndev_ops = {
	.ndo_set_mac_address = xgene_enet_set_mac_address,
};

static int xgene_get_port_id(struct device *dev, struct xgene_enet_pdata *pdata)
{
	u32 id = 0;
	int ret;

	ret = device_property_read_u32(dev, "port-id", &id);
	if (!ret && id > 1) {
		dev_err(dev, "Incorrect port-id specified\n");
		return -ENODEV;
	}

	pdata->port_id = id;

	return 0;
}

static int xgene_get_mac_address(struct device *dev,
				 unsigned char *addr)
{
@@ -843,6 +861,10 @@ static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
	}
	pdata->rx_irq = ret;

	ret = xgene_get_port_id(dev, pdata);
	if (ret)
		return ret;

	if (xgene_get_mac_address(dev, ndev->dev_addr) != ETH_ALEN)
		eth_hw_addr_random(ndev);

@@ -866,13 +888,13 @@ static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
		pdata->clk = NULL;
	}

	base_addr = pdata->base_addr;
	base_addr = pdata->base_addr - (pdata->port_id * MAC_OFFSET);
	pdata->eth_csr_addr = base_addr + BLOCK_ETH_CSR_OFFSET;
	pdata->eth_ring_if_addr = base_addr + BLOCK_ETH_RING_IF_OFFSET;
	pdata->eth_diag_csr_addr = base_addr + BLOCK_ETH_DIAG_CSR_OFFSET;
	if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII ||
	    pdata->phy_mode == PHY_INTERFACE_MODE_SGMII) {
		pdata->mcx_mac_addr = base_addr + BLOCK_ETH_MAC_OFFSET;
		pdata->mcx_mac_addr = pdata->base_addr + BLOCK_ETH_MAC_OFFSET;
		pdata->mcx_mac_csr_addr = base_addr + BLOCK_ETH_MAC_CSR_OFFSET;
	} else {
		pdata->mcx_mac_addr = base_addr + BLOCK_AXG_MAC_OFFSET;
@@ -935,6 +957,24 @@ static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
		pdata->rm = RM0;
		break;
	}

	switch (pdata->port_id) {
	case 0:
		pdata->cpu_bufnum = START_CPU_BUFNUM_0;
		pdata->eth_bufnum = START_ETH_BUFNUM_0;
		pdata->bp_bufnum = START_BP_BUFNUM_0;
		pdata->ring_num = START_RING_NUM_0;
		break;
	case 1:
		pdata->cpu_bufnum = START_CPU_BUFNUM_1;
		pdata->eth_bufnum = START_ETH_BUFNUM_1;
		pdata->bp_bufnum = START_BP_BUFNUM_1;
		pdata->ring_num = START_RING_NUM_1;
		break;
	default:
		break;
	}

}

static int xgene_enet_probe(struct platform_device *pdev)
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