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Commit a4d7a122 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm 

Pull ARM fixes from Russell King:
 "This includes three MMCI changes - one to fix up the wrong version of
  the DT support patch which was merged, and two to make deferred
  probing work.  It also includes a fix to the OMAP SPI driver which is
  causing a boot time warning.

  The remainder are very minor ARM fixes."

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  SPI: fix over-eager devm_xxx() conversion
  ARM: 7427/1: mmc: mmci: Defer probe() in case of yet uninitialized GPIOs
  ARM: 7426/1: mmc: mmci: Remove wrong error handling of gpio 0
  ARM: 7425/1: extable: ensure fixup entries are 4-byte aligned
  ARM: 7421/1: bpf_jit: BPF_S_ANC_ALU_XOR_X support
  ARM: 7423/1: kprobes: run t32_simulate_ldr_literal() without insn slot
  ARM: 7422/1: mmc: mmci: Allocate platform memory during Device Tree boot
parents 61fcbc8d 10aa5a35

arch/arm/include/asm/futex.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -19,6 +19,7 @@ 
	"	.long	1b, 4f, 2b, 4f\n"			\

	"	.long	1b, 4f, 2b, 4f\n"			\

	"	.popsection\n"					\

	"	.popsection\n"					\

	"	.pushsection .fixup,\"ax\"\n"			\

	"	.pushsection .fixup,\"ax\"\n"			\

	"	.align	2\n"					\

	"4:	mov	%0, " err_reg "\n"			\

	"4:	mov	%0, " err_reg "\n"			\

	"	b	3b\n"					\

	"	b	3b\n"					\

	"	.popsection"

	"	.popsection"

arch/arm/kernel/entry-armv.S

+1 −0
Original line number Original line Diff line number Diff line
@@ -495,6 +495,7 @@ ENDPROC(__und_usr) 
 * The out of line fixup for the ldrt above.

 * The out of line fixup for the ldrt above.

 */

 */

	.pushsection .fixup, "ax"

	.pushsection .fixup, "ax"

	.align	2

4:	mov	pc, r9

4:	mov	pc, r9

	.popsection

	.popsection

	.pushsection __ex_table,"a"

	.pushsection __ex_table,"a"

arch/arm/kernel/kprobes-thumb.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -660,7 +660,7 @@ static const union decode_item t32_table_1111_100x[] = { 
	/* LDRSB (literal)	1111 1001 x001 1111 xxxx xxxx xxxx xxxx */

	/* LDRSB (literal)	1111 1001 x001 1111 xxxx xxxx xxxx xxxx */

	/* LDRH (literal)	1111 1000 x011 1111 xxxx xxxx xxxx xxxx */

	/* LDRH (literal)	1111 1000 x011 1111 xxxx xxxx xxxx xxxx */

	/* LDRSH (literal)	1111 1001 x011 1111 xxxx xxxx xxxx xxxx */

	/* LDRSH (literal)	1111 1001 x011 1111 xxxx xxxx xxxx xxxx */

	DECODE_EMULATEX	(0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,

	DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,

						 REGS(PC, NOSPPCX, 0, 0, 0)),

						 REGS(PC, NOSPPCX, 0, 0, 0)),





	/* STRB (immediate)	1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */

	/* STRB (immediate)	1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */

arch/arm/net/bpf_jit_32.c

+5 −0
Original line number Original line Diff line number Diff line
@@ -762,6 +762,11 @@ static int build_body(struct jit_ctx *ctx) 
			update_on_xread(ctx);

			update_on_xread(ctx);

			emit(ARM_MOV_R(r_A, r_X), ctx);

			emit(ARM_MOV_R(r_A, r_X), ctx);

			break;

			break;

		case BPF_S_ANC_ALU_XOR_X:

			/* A ^= X */

			update_on_xread(ctx);

			emit(ARM_EOR_R(r_A, r_A, r_X), ctx);

			break;

		case BPF_S_ANC_PROTOCOL:

		case BPF_S_ANC_PROTOCOL:

			/* A = ntohs(skb->protocol) */

			/* A = ntohs(skb->protocol) */

			ctx->seen |= SEEN_SKB;

			ctx->seen |= SEEN_SKB;

arch/arm/net/bpf_jit_32.h

+4 −0
Original line number Original line Diff line number Diff line
@@ -68,6 +68,8 @@ 
#define ARM_INST_CMP_R		0x01500000

#define ARM_INST_CMP_R		0x01500000

#define ARM_INST_CMP_I		0x03500000

#define ARM_INST_CMP_I		0x03500000





#define ARM_INST_EOR_R		0x00200000



#define ARM_INST_LDRB_I		0x05d00000

#define ARM_INST_LDRB_I		0x05d00000

#define ARM_INST_LDRB_R		0x07d00000

#define ARM_INST_LDRB_R		0x07d00000

#define ARM_INST_LDRH_I		0x01d000b0

#define ARM_INST_LDRH_I		0x01d000b0
@@ -132,6 +134,8 @@ 
#define ARM_CMP_R(rn, rm)	_AL3_R(ARM_INST_CMP, 0, rn, rm)

#define ARM_CMP_R(rn, rm)	_AL3_R(ARM_INST_CMP, 0, rn, rm)

#define ARM_CMP_I(rn, imm)	_AL3_I(ARM_INST_CMP, 0, rn, imm)

#define ARM_CMP_I(rn, imm)	_AL3_I(ARM_INST_CMP, 0, rn, imm)





#define ARM_EOR_R(rd, rn, rm)	_AL3_R(ARM_INST_EOR, rd, rn, rm)



#define ARM_LDR_I(rt, rn, off)	(ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \

#define ARM_LDR_I(rt, rn, off)	(ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \

				 | (off))

				 | (off))

#define ARM_LDRB_I(rt, rn, off)	(ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \

#define ARM_LDRB_I(rt, rn, off)	(ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \