Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a2e5d827 authored by Archit Taneja's avatar Archit Taneja Committed by Tomi Valkeinen
Browse files

OMAPDSS: Fix DSI_FCLK clock source selection 



The wrong bit field was being updated in DSS_CTRL when trying to configure the
clock source of DSI2 functional clock. Use the correct bit field based on the
dsi module number.

Signed-off-by: default avatarArchit Taneja <archit@ti.com>
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent 9b9c457b

drivers/video/omap2/dss/dss.c

+3 −2
Original line number Diff line number Diff line
@@ -335,7 +335,7 @@ void dss_select_dsi_clk_source(int dsi_module, 
		enum omap_dss_clk_source clk_src)

{

	struct platform_device *dsidev;

	int b;

	int b, pos;



	switch (clk_src) {

	case OMAP_DSS_CLK_SRC_FCK:
@@ -357,7 +357,8 @@ void dss_select_dsi_clk_source(int dsi_module, 
		BUG();

	}



	REG_FLD_MOD(DSS_CONTROL, b, 1, 1);	/* DSI_CLK_SWITCH */

	pos = dsi_module == 0 ? 1 : 10;

	REG_FLD_MOD(DSS_CONTROL, b, pos, pos);	/* DSIx_CLK_SWITCH */



	dss.dsi_clk_source[dsi_module] = clk_src;

}