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Commit a157f2cb authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add support for the stall based memlat"

parents 278b4395 58fb7b9c

arch/arm64/boot/dts/qcom/sm6150.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -2690,6 +2690,7 @@ 
		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>;

		qcom,target-dev = <&cpu0_cpu_l3_lat>;

		qcom,cachemiss-ev = <0x17>;

		qcom,stall-cycle-ev = <0xE7>;

		qcom,core-dev-table =

			<  576000  300000000 >,

			< 1017600  556800000 >,
@@ -2710,6 +2711,7 @@ 
		qcom,cpulist = <&CPU6 &CPU7>;

		qcom,target-dev = <&cpu6_cpu_l3_lat>;

		qcom,cachemiss-ev = <0x17>;

		qcom,stall-cycle-ev = <0x15E>;

		qcom,core-dev-table =

			< 1017600  556800000 >,

			< 1209600  806400000 >,
@@ -2732,6 +2734,7 @@ 
		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>;

		qcom,target-dev = <&cpu0_cpu_llcc_lat>;

		qcom,cachemiss-ev = <0x2A>;

		qcom,stall-cycle-ev = <0xE7>;

		qcom,core-dev-table =

			<  748000 MHZ_TO_MBPS(150, 16) >,

			< 1209600 MHZ_TO_MBPS(300, 16) >,
@@ -2753,6 +2756,7 @@ 
		qcom,cpulist = <&CPU6 &CPU7>;

		qcom,target-dev = <&cpu6_cpu_llcc_lat>;

		qcom,cachemiss-ev = <0x2A>;

		qcom,stall-cycle-ev = <0x15E>;

		qcom,core-dev-table =

			<  768000 MHZ_TO_MBPS(300, 16) >,

			< 1017600 MHZ_TO_MBPS(466, 16) >,
@@ -2775,6 +2779,7 @@ 
		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>;

		qcom,target-dev = <&cpu0_llcc_ddr_lat>;

		qcom,cachemiss-ev = <0x1000>;

		qcom,stall-cycle-ev = <0xE7>;

		qcom,core-dev-table =

			<  748000 MHZ_TO_MBPS( 300, 4) >,

			< 1017600 MHZ_TO_MBPS( 451, 4) >,
@@ -2797,6 +2802,7 @@ 
		qcom,cpulist = <&CPU6 &CPU7>;

		qcom,target-dev = <&cpu6_llcc_ddr_lat>;

		qcom,cachemiss-ev = <0x1000>;

		qcom,stall-cycle-ev = <0x15E>;

		qcom,core-dev-table =

			<  768000 MHZ_TO_MBPS( 451, 4) >,

			< 1017600 MHZ_TO_MBPS( 547, 4) >,