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Commit 9f5fe7fa authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: Enable HIGHMEM for SA515M"

parents fccbfd18 16b3da13

arch/arm/configs/vendor/sa515m-perf_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ CONFIG_ARCH_SDXPRAIRIE=y 
CONFIG_PCI_MSM=y

CONFIG_PCI_MSM_MSI=y

CONFIG_PREEMPT=y

CONFIG_HIGHMEM=y

CONFIG_CMA=y

CONFIG_SECCOMP=y

CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y

arch/arm/configs/vendor/sa515m_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ CONFIG_ARCH_SDXPRAIRIE=y 
CONFIG_PCI_MSM=y

CONFIG_PCI_MSM_MSI=y

CONFIG_PREEMPT=y

CONFIG_HIGHMEM=y

CONFIG_CMA=y

CONFIG_SECCOMP=y

CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y

drivers/mtd/nand/nand_ids.c

+3 −0
Original line number Diff line number Diff line
@@ -69,6 +69,9 @@ struct nand_flash_dev nand_flash_ids[] = { 
	{"MT29F4G08ABBFAH4 4G 1.8V 8-bit",

		{ .id = {0x2c, 0xac, 0x80, 0x26, 0x62, 0x00, 0x00, 0x00} },

		SZ_4K, SZ_512, SZ_256K, 0, 5, 256, NAND_ECC_INFO(8, SZ_512)},

	{"MT29F8G08ADBFA 8G 1.8V 8-bit",

		{ .id = {0x2c, 0xa3, 0xd0, 0x26, 0x66, 0x00, 0x00, 0x00} },

		SZ_4K, SZ_1K, SZ_256K, 0, 5, 256, NAND_ECC_INFO(8, SZ_512)},



	LEGACY_ID_NAND("NAND 4MiB 5V 8-bit",   0x6B, 4, SZ_8K, SP_OPTIONS),

	LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),