Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9f392e8e authored by Rama Krishna Phani A's avatar Rama Krishna Phani A
Browse files

ARM: dts: msm: update pcie IRQ's for sa8195p 



Update PCIe interrupt numbers to correct values for sa8195p.

Change-Id: I2856e027c2ee22b05a0af849ace06c575b29620a
Signed-off-by: default avatarRama Krishna Phani A <rphani@codeaurora.org>
parent 497e1f66

arch/arm64/boot/dts/qcom/sa8195p-pcie.dtsi

+10 −10
Original line number Diff line number Diff line
@@ -309,11 +309,11 @@ 
				"int_d";

		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0xffffffff>;

		interrupt-map = <0 0 0 0 &intc 0 758 0

				0 0 0 1 &intc 0 748 0

				0 0 0 2 &intc 0 747 0

				0 0 0 3 &intc 0 746 0

				0 0 0 4 &intc 0 745 0>;

		interrupt-map = <0 0 0 0 &intc 0 757 0

				0 0 0 1 &intc 0 747 0

				0 0 0 2 &intc 0 746 0

				0 0 0 3 &intc 0 745 0

				0 0 0 4 &intc 0 744 0>;



		qcom,tcsr = <0x0 0x0>;

		qcom,phy-sequence = <0x0a40 0x03 0x0
@@ -616,11 +616,11 @@ 
				"int_d";

		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0xffffffff>;

		interrupt-map = <0 0 0 0 &intc 0 744 0

				0 0 0 1 &intc 0 664 0

				0 0 0 2 &intc 0 663 0

				0 0 0 3 &intc 0 662 0

				0 0 0 4 &intc 0 661 0>;

		interrupt-map = <0 0 0 0 &intc 0 743 0

				0 0 0 1 &intc 0 663 0

				0 0 0 2 &intc 0 662 0

				0 0 0 3 &intc 0 661 0

				0 0 0 4 &intc 0 660 0>;



		qcom,tcsr = <0x0 0x0>;

		qcom,phy-sequence = <0x0a40 0x03 0x0