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Commit 9b34c6da authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "UPSTREAM commit 'b5215017' 11/01"

parents 8817d5ed 0d95a846

arch/arm64/boot/dts/qcom/sdmmagpie-camera-sensor-idp.dtsi

+15 −13
Original line number Diff line number Diff line
@@ -74,13 +74,13 @@ 
		actuator-src = <&actuator_rear>;

		cam_vio-supply = <&pm8009_l7>;

		cam_vana-supply = <&pm8009_l5>;

		cam_vdig-supply = <&pm8009_l4>;

		cam_vdig-supply = <&pm8009_l1>;

		cam_clk-supply = <&titan_top_gdsc>;

		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk";

		rgltr-cntrl-support;

		rgltr-min-voltage = <1800000 2850000 1100000 0>;

		rgltr-max-voltage = <1800000 2850000 1100000 0>;

		rgltr-min-voltage = <1800000 2800000 1100000 0>;

		rgltr-max-voltage = <1800000 2800000 1100000 0>;

		rgltr-load-current = <0 80000 105000 0>;

		gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";
@@ -136,6 +136,7 @@ 
		sensor-mode = <0>;

		cci-master = <1>;

		status = "ok";

		clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;

		clock-names = "cam_clk";

		clock-cntl-level = "turbo";

		clock-rates = <24000000>;
@@ -152,8 +153,8 @@ 
		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk";

		rgltr-cntrl-support;

		rgltr-min-voltage = <1800000 2800000 1040000 0>;

		rgltr-max-voltage = <1800000 2800000 1040000 0>;

		rgltr-min-voltage = <1800000 2800000 1050000 0>;

		rgltr-max-voltage = <1800000 2800000 1050000 0>;

		rgltr-load-current = <0 80000 105000 0 0>;

		gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";
@@ -169,7 +170,8 @@ 
		gpio-req-tbl-label = "CAMIF_MCLK2",

					"CAM_RESET2";

		sensor-mode = <0>;

		cci-master = <1>;

		cci-device = <1>;

		cci-master = <0>;

		status = "ok";

		clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;

		clock-names = "cam_clk";
@@ -182,7 +184,7 @@ 
		compatible = "qcom,cam-sensor";

		reg = <0x0>;

		csiphy-sd-index = <0>;

		sensor-position-roll = <270>;

		sensor-position-roll = <90>;

		sensor-position-pitch = <0>;

		sensor-position-yaw = <180>;

		led-flash-src = <&led_flash_rear>;
@@ -190,13 +192,13 @@ 
		actuator-src = <&actuator_rear>;

		cam_vio-supply = <&pm8009_l7>;

		cam_vana-supply = <&pm8009_l5>;

		cam_vdig-supply = <&pm8009_l4>;

		cam_vdig-supply = <&pm8009_l1>;

		cam_clk-supply = <&titan_top_gdsc>;

		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk";

		rgltr-cntrl-support;

		rgltr-min-voltage = <1800000 2850000 1100000 0>;

		rgltr-max-voltage = <1800000 2850000 1100000 0>;

		rgltr-min-voltage = <1800000 2800000 1100000 0>;

		rgltr-max-voltage = <1800000 2800000 1100000 0>;

		rgltr-load-current = <0 80000 105000 0>;

		gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";
@@ -225,7 +227,7 @@ 
		compatible = "qcom,cam-sensor";

		reg = <0x1>;

		csiphy-sd-index = <1>;

		sensor-position-roll = <270>;

		sensor-position-roll = <90>;

		sensor-position-pitch = <0>;

		sensor-position-yaw = <180>;

		led-flash-src = <&led_flash_rear_aux>;
@@ -279,8 +281,8 @@ 
		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk";

		rgltr-cntrl-support;

		rgltr-min-voltage = <1800000 2800000 1040000 0>;

		rgltr-max-voltage = <1800000 2800000 1040000 0>;

		rgltr-min-voltage = <1800000 2800000 1050000 0>;

		rgltr-max-voltage = <1800000 2800000 1050000 0>;

		rgltr-load-current = <0 80000 105000 0>;

		gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";

arch/arm64/boot/dts/qcom/sdmmagpie-camera.dtsi

+12 −6
Original line number Diff line number Diff line
@@ -60,18 +60,20 @@ 
		csi-vdd-voltage = <1200000>;

		mipi-csi-vdd-supply = <&pm6150l_l3>;

		clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,

			<&clock_camcc CAM_CC_CSIPHY0_CLK>,

			<&clock_camcc CAM_CC_CSIPHY1_CLK>,

			<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,

			<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>;

		clock-names = "cphy_rx_clk_src",

			"csiphy0_clk",

			"csiphy1_clk",

			"csi1phytimer_clk_src",

			"csi1phytimer_clk";

		src-clock-name = "csi1phytimer_clk_src";

		clock-cntl-level = "svs_l1", "turbo";

		clock-rates =

			<400000000 0 300000000 0>,

			<400000000 0 300000000 0>;

			<400000000 0 0 300000000 0>,

			<400000000 0 0 300000000 0>;



		status = "ok";

	};
@@ -90,18 +92,20 @@ 
		csi-vdd-voltage = <1200000>;

		mipi-csi-vdd-supply = <&pm6150l_l3>;

		clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,

			<&clock_camcc CAM_CC_CSIPHY0_CLK>,

			<&clock_camcc CAM_CC_CSIPHY2_CLK>,

			<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,

			<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>;

		clock-names = "cphy_rx_clk_src",

			"csiphy0_clk",

			"csiphy2_clk",

			"csi2phytimer_clk_src",

			"csi2phytimer_clk";

		src-clock-name = "csi2phytimer_clk_src";

		clock-cntl-level = "svs_l1", "turbo";

		clock-rates =

			<400000000 0 300000000 0>,

			<400000000 0 300000000 0>;

			<400000000 0 0 300000000 0>,

			<400000000 0 0 300000000 0>;

		status = "ok";

	};
@@ -119,18 +123,20 @@ 
		csi-vdd-voltage = <1200000>;

		mipi-csi-vdd-supply = <&pm6150l_l3>;

		clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,

			<&clock_camcc CAM_CC_CSIPHY0_CLK>,

			<&clock_camcc CAM_CC_CSIPHY2_CLK>,

			<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,

			<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>;

		clock-names = "cphy_rx_clk_src",

			"csiphy0_clk",

			"csiphy3_clk",

			"csi3phytimer_clk_src",

			"csi3phytimer_clk";

		src-clock-name = "csi3phytimer_clk_src";

		clock-cntl-level = "svs_l1", "turbo";

		clock-rates =

			<400000000 0 300000000 0>,

			<400000000 0 300000000 0>;

			<400000000 0 0 300000000 0>,

			<400000000 0 0 300000000 0>;

		status = "ok";

	};

arch/arm64/boot/dts/qcom/sm6150-camera.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -987,9 +987,9 @@ 
			<&clock_camcc CAM_CC_JPEG_CLK_SRC>,

			<&clock_camcc CAM_CC_JPEG_CLK>;



		clock-rates = <0 0 0 0 0 320000000 0>;

		clock-rates = <0 0 0 0 0 600000000 0>;

		src-clock-name = "jpegenc_clk_src";

		clock-cntl-level = "nominal";

		clock-cntl-level = "turbo";

		status = "ok";

	};
@@ -1018,9 +1018,9 @@ 
			<&clock_camcc CAM_CC_JPEG_CLK_SRC>,

			<&clock_camcc CAM_CC_JPEG_CLK>;



		clock-rates = <0 0 0 0 0 320000000 0>;

		clock-rates = <0 0 0 0 0 600000000 0>;

		src-clock-name = "jpegdma_clk_src";

		clock-cntl-level = "nominal";

		clock-cntl-level = "turbo";

		status = "ok";

	};

drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.c

+8 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include "cpastop_v170_110.h"

#include "cpastop_v175_100.h"

#include "cpastop_v175_101.h"

#include "cpastop_v175_120.h"



struct cam_camnoc_info *camnoc_info;
@@ -105,6 +106,10 @@ static int cam_cpastop_get_hw_info(struct cam_hw_info *cpas_hw, 
			(hw_caps->cpas_version.minor == 0) &&

			(hw_caps->cpas_version.incr == 1))

			soc_info->hw_version = CAM_CPAS_TITAN_175_V101;

		else if ((hw_caps->cpas_version.major == 1) &&

			(hw_caps->cpas_version.minor == 2) &&

			(hw_caps->cpas_version.incr == 0))

			soc_info->hw_version = CAM_CPAS_TITAN_175_V120;

	} else if ((hw_caps->camera_version.major == 1) &&

		(hw_caps->camera_version.minor == 5) &&

		(hw_caps->camera_version.incr == 0)) {
@@ -587,6 +592,9 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw, 
	case CAM_CPAS_TITAN_175_V101:

		camnoc_info = &cam175_cpas101_camnoc_info;

		break;

	case CAM_CPAS_TITAN_175_V120:

		camnoc_info = &cam175_cpas120_camnoc_info;

		break;

	case CAM_CPAS_TITAN_150_V100:

		camnoc_info = &cam150_cpas100_camnoc_info;

		break;

drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.h

+19 −0
Original line number Diff line number Diff line
@@ -36,6 +36,10 @@ 
 * @CAM_CAMNOC_HW_IRQ_IPE_BPS_UBWC_ENCODE_ERROR: Triggered if any error

 *                                               detected in the IPE/BPS UBWC

 *                                               encoder instance

 * @CAM_CAMNOC_HW_IRQ_IFE0_UBWC_ENCODE_ERROR:    Triggered if any UBWC error

 *                                               is detected in IFE0 write path

 * @CAM_CAMNOC_HW_IRQ_IFE1_WRITE_UBWC_ENCODE_ERROR:  Triggered if any UBWC error

 *                                               is detected in IFE1 write path

 * @CAM_CAMNOC_HW_IRQ_AHB_TIMEOUT              : Triggered when the QHS_ICP

 *                                               slave  times out after 4000

 *                                               AHB cycles
@@ -50,6 +54,10 @@ enum cam_camnoc_hw_irq_type { 
		CAM_CAMNOC_IRQ_IFE02_UBWC_ENCODE_ERROR,

	CAM_CAMNOC_HW_IRQ_IFE13_UBWC_ENCODE_ERROR =

		CAM_CAMNOC_IRQ_IFE13_UBWC_ENCODE_ERROR,

	CAM_CAMNOC_HW_IRQ_IFE0_UBWC_ENCODE_ERROR =

		CAM_CAMNOC_IRQ_IFE0_UBWC_ENCODE_ERROR,

	CAM_CAMNOC_HW_IRQ_IFE1_WRITE_UBWC_ENCODE_ERROR =

		CAM_CAMNOC_IRQ_IFE1_WRITE_UBWC_ENCODE_ERROR,

	CAM_CAMNOC_HW_IRQ_IPE_BPS_UBWC_DECODE_ERROR =

		CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR,

	CAM_CAMNOC_HW_IRQ_IPE_BPS_UBWC_ENCODE_ERROR =
@@ -69,10 +77,16 @@ enum cam_camnoc_hw_irq_type { 
 * @CAM_CAMNOC_CDM: Indicates CDM HW connection to camnoc

 * @CAM_CAMNOC_IFE02: Indicates IFE0, IFE2 HW connection to camnoc

 * @CAM_CAMNOC_IFE13: Indicates IFE1, IFE3 HW connection to camnoc

 * @CAM_CAMNOC_IFE0123_RDI_WRITE: RDI write only for all IFEx

 * @CAM_CAMNOC_IFE0_NRDI_WRITE: IFE0 non-RDI write

 * @CAM_CAMNOC_IFE01_RDI_READ: IFE0/1 RDI READ

 * @CAM_CAMNOC_IFE1_NRDI_WRITE: IFE1 non-RDI write

 * @CAM_CAMNOC_IPE_BPS_LRME_READ: Indicates IPE, BPS, LRME Read HW

 *         connection to camnoc

 * @CAM_CAMNOC_IPE_BPS_LRME_WRITE: Indicates IPE, BPS, LRME Write HW

 *         connection to camnoc

 * @CAM_CAMNOC_IPE_VID_DISP_WRITE: Indicates IPE's VID/DISP Wrire HW

 *         connection to camnoc

 * @CAM_CAMNOC_JPEG: Indicates JPEG HW connection to camnoc

 * @CAM_CAMNOC_FD: Indicates FD HW connection to camnoc

 * @CAM_CAMNOC_ICP: Indicates ICP HW connection to camnoc
@@ -81,8 +95,13 @@ enum cam_camnoc_port_type { 
	CAM_CAMNOC_CDM,

	CAM_CAMNOC_IFE02,

	CAM_CAMNOC_IFE13,

	CAM_CAMNOC_IFE0123_RDI_WRITE,

	CAM_CAMNOC_IFE0_NRDI_WRITE,

	CAM_CAMNOC_IFE01_RDI_READ,

	CAM_CAMNOC_IFE1_NRDI_WRITE,

	CAM_CAMNOC_IPE_BPS_LRME_READ,

	CAM_CAMNOC_IPE_BPS_LRME_WRITE,

	CAM_CAMNOC_IPE_VID_DISP_WRITE,

	CAM_CAMNOC_JPEG,

	CAM_CAMNOC_FD,

	CAM_CAMNOC_ICP,