Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 99dad8b3 authored by Alexander Duyck's avatar Alexander Duyck Committed by Jeff Kirsher
Browse files

i40e: Drop redundant Rx descriptor processing code 



This patch cleans up several pieces of redundant code in the Rx clean-up
paths.

The first bit is that hdr_addr and the status_err_len portions of the Rx
descriptor represent the same value.  As such there is no point in setting
them to 0 before setting them to 0.  I'm dropping the second spot where we
are updating the value to 0 so that we only have 1 write for this value
instead of 2.

The second piece is the checking for the DD bit in the packet.  We only
need to check for a non-zero value for the status_err_len because if the
device is done with the descriptor it will have written something back and
the DD is just one piece of it.  In addition I have moved the reading of
the Rx descriptor bits related to rx_ptype down so that they are actually
below the dma_rmb() call so that we are guaranteed that we don't have any
funky 64b on 32b calls causing any ordering issues.

Change-ID: I256e44a025d3c64a7224aaaec37c852bfcb1871b
Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 12815057

drivers/net/ethernet/intel/i40e/i40e_txrx.c

+6 −12
Original line number Diff line number Diff line
@@ -1220,7 +1220,6 @@ bool i40e_alloc_rx_buffers(struct i40e_ring *rx_ring, u16 cleaned_count) 
		 * because each write-back erases this info.

		 */

		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);

		rx_desc->read.hdr_addr = 0;



		rx_desc++;

		bi++;
@@ -1741,7 +1740,6 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget) 
	while (likely(total_rx_packets < budget)) {

		union i40e_rx_desc *rx_desc;

		struct sk_buff *skb;

		u32 rx_status;

		u16 vlan_tag;

		u8 rx_ptype;

		u64 qword;
@@ -1755,21 +1753,13 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget) 


		rx_desc = I40E_RX_DESC(rx_ring, rx_ring->next_to_clean);



		qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);

		rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>

			   I40E_RXD_QW1_PTYPE_SHIFT;

		rx_status = (qword & I40E_RXD_QW1_STATUS_MASK) >>

			    I40E_RXD_QW1_STATUS_SHIFT;



		if (!(rx_status & BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))

			break;



		/* status_error_len will always be zero for unused descriptors

		 * because it's cleared in cleanup, and overlaps with hdr_addr

		 * which is always zero because packet split isn't used, if the

		 * hardware wrote DD then it will be non-zero

		 */

		if (!rx_desc->wb.qword1.status_error_len)

		if (!i40e_test_staterr(rx_desc,

				       BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))

			break;



		/* This memory barrier is needed to keep us from reading
@@ -1803,6 +1793,10 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget) 
		/* probably a little skewed due to removing CRC */

		total_rx_bytes += skb->len;



		qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);

		rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>

			   I40E_RXD_QW1_PTYPE_SHIFT;



		/* populate checksum, VLAN, and protocol */

		i40e_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);

drivers/net/ethernet/intel/i40evf/i40e_txrx.c

+6 −12
Original line number Diff line number Diff line
@@ -705,7 +705,6 @@ bool i40evf_alloc_rx_buffers(struct i40e_ring *rx_ring, u16 cleaned_count) 
		 * because each write-back erases this info.

		 */

		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);

		rx_desc->read.hdr_addr = 0;



		rx_desc++;

		bi++;
@@ -1209,7 +1208,6 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget) 
	while (likely(total_rx_packets < budget)) {

		union i40e_rx_desc *rx_desc;

		struct sk_buff *skb;

		u32 rx_status;

		u16 vlan_tag;

		u8 rx_ptype;

		u64 qword;
@@ -1223,21 +1221,13 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget) 


		rx_desc = I40E_RX_DESC(rx_ring, rx_ring->next_to_clean);



		qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);

		rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>

			   I40E_RXD_QW1_PTYPE_SHIFT;

		rx_status = (qword & I40E_RXD_QW1_STATUS_MASK) >>

			    I40E_RXD_QW1_STATUS_SHIFT;



		if (!(rx_status & BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))

			break;



		/* status_error_len will always be zero for unused descriptors

		 * because it's cleared in cleanup, and overlaps with hdr_addr

		 * which is always zero because packet split isn't used, if the

		 * hardware wrote DD then it will be non-zero

		 */

		if (!rx_desc->wb.qword1.status_error_len)

		if (!i40e_test_staterr(rx_desc,

				       BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))

			break;



		/* This memory barrier is needed to keep us from reading
@@ -1271,6 +1261,10 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget) 
		/* probably a little skewed due to removing CRC */

		total_rx_bytes += skb->len;



		qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);

		rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>

			   I40E_RXD_QW1_PTYPE_SHIFT;



		/* populate checksum, VLAN, and protocol */

		i40evf_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);