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Commit 97d8bcb3 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "iommu : arm-smmu : update MID info in ECATS register"

parents f4e14184 84be684b

drivers/iommu/arm-smmu.c

+8 −0
Original line number Diff line number Diff line
@@ -5026,6 +5026,11 @@ IOMMU_OF_DECLARE(cavium_smmuv2, "cavium,smmu-v2", arm_smmu_of_init); 
#define DEBUG_PAR_PA_SHIFT		12

#define DEBUG_PAR_FAULT_VAL		0x1



#define DEBUG_AXUSER_REG		0x30

#define DEBUG_AXUSER_CDMID_MASK         0xff

#define DEBUG_AXUSER_CDMID_SHIFT        36

#define DEBUG_AXUSER_CDMID_VAL          255



#define TBU_DBG_TIMEOUT_US		100



#define QSMMUV500_ACTLR_DEEP_PREFETCH_MASK	0x3
@@ -5292,6 +5297,9 @@ static phys_addr_t qsmmuv500_iova_to_phys( 
	val |= sid & DEBUG_SID_HALT_SID_MASK;

	writeq_relaxed(val, tbu->base + DEBUG_SID_HALT_REG);

	writeq_relaxed(iova, tbu->base + DEBUG_VA_ADDR_REG);

	val = (u64)(DEBUG_AXUSER_CDMID_VAL & DEBUG_AXUSER_CDMID_MASK) <<

		DEBUG_AXUSER_CDMID_SHIFT;

	writeq_relaxed(val, tbu->base + DEBUG_AXUSER_REG);



	/*

	 * Write-back Read and Write-Allocate