Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 966dc11f authored by David Mosberger-Tang's avatar David Mosberger-Tang Committed by Tony Luck
Browse files

[IA64] Fix stack placement when INIT hits in kernel mode.



Without this patch, the stack is placed _below_ the current task
structure, which is risky at best.

Tony, I think this patch needs to go into 2.6.12, since it fixes a
real bug.  Without it, INIT may case secondary errors, which would be
most unpleasant.

Signed-off-by: default avatarDavid Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent b3214970
Loading
Loading
Loading
Loading
+1 −2
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@
(pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;;							\
(pKStk) ld8 r3 = [r3];;										\
(pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;;						\
(pKStk) addl sp=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3;						\
(pKStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3;						\
(pUStk)	mov ar.rsc=0;		/* set enforced lazy mode, pl 0, little-endian, loadrs=0 */	\
(pUStk)	addl r22=IA64_RBS_OFFSET,r1;		/* compute base of register backing store */	\
	;;											\
@@ -50,7 +50,6 @@
(pUStk)	mov r23=ar.bspstore;				/* save ar.bspstore */			\
(pUStk)	dep r22=-1,r22,61,3;			/* compute kernel virtual addr of RBS */	\
	;;											\
(pKStk) addl r1=-IA64_PT_REGS_SIZE,r1;		/* if in kernel mode, use sp (r12) */		\
(pUStk)	mov ar.bspstore=r22;			/* switch to kernel RBS */			\
	;;											\
(pUStk)	mov r18=ar.bsp;										\