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Commit 94ebb463 authored by Ritesh Kumar's avatar Ritesh Kumar Committed by Gerrit - the friendly Code Review server
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clk: qcom: mdss: Add additional dividers for 10nm pll CPHY support 



Panels supporting Cphy use a specific divider blocks. Add additional
divider blocks for clock output to support DSI CPHY.

Change-Id: Ie509c9074ced7ae055a4feff88d7d4a529f11d0c
Signed-off-by: default avatarRitesh Kumar <riteshk@codeaurora.org>
parent 328e4eeb
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