Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 948869fa authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MIPS updates from James Hogan:
 "These are the main MIPS changes for 4.17. Rough overview:

   (1) generic platform: Add support for Microsemi Ocelot SoCs

   (2) crypto: Add CRC32 and CRC32C HW acceleration module

   (3) Various cleanups and misc improvements

  More detailed summary:

  Miscellaneous:
   - hang more efficiently on halt/powerdown/restart
   - pm-cps: Block system suspend when a JTAG probe is present
   - expand make help text for generic defconfigs
   - refactor handling of legacy defconfigs
   - determine the entry point from the ELF file header to fix microMIPS
     for certain toolchains
   - introduce isa-rev.h for MIPS_ISA_REV and use to simplify other code

  Minor cleanups:
   - DTS: boston/ci20: Unit name cleanups and correction
   - kdump: Make the default for PHYSICAL_START always 64-bit
   - constify gpio_led in Alchemy, AR7, and TXX9
   - silence a couple of W=1 warnings
   - remove duplicate includes

  Platform support:
  Generic platform:
   - add support for Microsemi Ocelot
   - dt-bindings: Add vendor prefix for Microsemi Corporation
   - dt-bindings: Add bindings for Microsemi SoCs
   - add ocelot SoC & PCB123 board DTS files
   - MAINTAINERS: Add entry for Microsemi MIPS SoCs
   - enable crc32-mips on r6 configs

  ath79:
   - fix AR724X_PLL_REG_PCIE_CONFIG offset

  BCM47xx:
   - firmware: Use mac_pton() for MAC address parsing
   - add Luxul XAP1500/XWR1750 WiFi LEDs
   - use standard reset button for Luxul XWR-1750

  BMIPS:
   - enable CONFIG_BRCMSTB_PM in bmips_stb_defconfig for build coverage
   - add STB PM, wake-up timer, watchdog DT nodes

  Octeon:
   - drop '.' after newlines in printk calls

  ralink:
   - pci-mt7621: Enable PCIe on MT7688"

* tag 'mips_4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (37 commits)
  MIPS: BCM47XX: Use standard reset button for Luxul XWR-1750
  MIPS: BCM47XX: Add Luxul XAP1500/XWR1750 WiFi LEDs
  MIPS: Make the default for PHYSICAL_START always 64-bit
  MIPS: Use the entry point from the ELF file header
  MAINTAINERS: Add entry for Microsemi MIPS SoCs
  MIPS: generic: Add support for Microsemi Ocelot
  MIPS: mscc: Add ocelot PCB123 device tree
  MIPS: mscc: Add ocelot dtsi
  dt-bindings: mips: Add bindings for Microsemi SoCs
  dt-bindings: Add vendor prefix for Microsemi Corporation
  MIPS: ath79: Fix AR724X_PLL_REG_PCIE_CONFIG offset
  MIPS: pci-mt7620: Enable PCIe on MT7688
  MIPS: pm-cps: Block system suspend when a JTAG probe is present
  MIPS: VDSO: Replace __mips_isa_rev with MIPS_ISA_REV
  MIPS: BPF: Replace __mips_isa_rev with MIPS_ISA_REV
  MIPS: cpu-features.h: Replace __mips_isa_rev with MIPS_ISA_REV
  MIPS: Introduce isa-rev.h to define MIPS_ISA_REV
  MIPS: Hang more efficiently on halt/powerdown/restart
  FIRMWARE: bcm47xx_nvram: Replace mac address parsing
  MIPS: BMIPS: Add Broadcom STB watchdog nodes
  ...
parents 2a56bb59 a5075e62
Loading
Loading
Loading
Loading
+43 −0
Original line number Original line Diff line number Diff line
* Microsemi MIPS CPUs

Boards with a SoC of the Microsemi MIPS family shall have the following
properties:

Required properties:
- compatible: "mscc,ocelot"


* Other peripherals:

o CPU chip regs:

The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
functionalities: chip ID, general purpose register for software use, reset
controller, hardware status and configuration, efuses.

Required properties:
- compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
- reg : Should contain registers location and length

Example:
	syscon@71070000 {
		compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
		reg = <0x71070000 0x1c>;
	};


o CPU system control:

The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of
the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU
endianness, CPU bus control, CPU status.

Required properties:
- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
- reg : Should contain registers location and length

Example:
	syscon@70000000 {
		compatible = "mscc,ocelot-cpu-syscon", "syscon";
		reg = <0x70000000 0x2c>;
	};
+1 −0
Original line number Original line Diff line number Diff line
@@ -225,6 +225,7 @@ motorola Motorola, Inc.
moxa	Moxa Inc.
moxa	Moxa Inc.
mpl	MPL AG
mpl	MPL AG
mqmaker	mqmaker Inc.
mqmaker	mqmaker Inc.
mscc	Microsemi Corporation
msi	Micro-Star International Co. Ltd.
msi	Micro-Star International Co. Ltd.
mti	Imagination Technologies Ltd. (formerly MIPS Technologies Inc.)
mti	Imagination Technologies Ltd. (formerly MIPS Technologies Inc.)
multi-inno	Multi-Inno Technology Co.,Ltd
multi-inno	Multi-Inno Technology Co.,Ltd
+9 −0
Original line number Original line Diff line number Diff line
@@ -9230,6 +9230,15 @@ S: Maintained
F:	drivers/usb/misc/usb251xb.c
F:	drivers/usb/misc/usb251xb.c
F:	Documentation/devicetree/bindings/usb/usb251xb.txt
F:	Documentation/devicetree/bindings/usb/usb251xb.txt


MICROSEMI MIPS SOCS
M:	Alexandre Belloni <alexandre.belloni@bootlin.com>
L:	linux-mips@linux-mips.org
S:	Maintained
F:	arch/mips/generic/board-ocelot.c
F:	arch/mips/configs/generic/board-ocelot.config
F:	arch/mips/boot/dts/mscc/
F:	Documentation/devicetree/bindings/mips/mscc.txt

MICROSEMI SMART ARRAY SMARTPQI DRIVER (smartpqi)
MICROSEMI SMART ARRAY SMARTPQI DRIVER (smartpqi)
M:	Don Brace <don.brace@microsemi.com>
M:	Don Brace <don.brace@microsemi.com>
L:	esc.storagedev@microsemi.com
L:	esc.storagedev@microsemi.com
+5 −2
Original line number Original line Diff line number Diff line
@@ -2029,6 +2029,7 @@ config CPU_MIPSR6
	select CPU_HAS_RIXI
	select CPU_HAS_RIXI
	select HAVE_ARCH_BITREVERSE
	select HAVE_ARCH_BITREVERSE
	select MIPS_ASID_BITS_VARIABLE
	select MIPS_ASID_BITS_VARIABLE
	select MIPS_CRC_SUPPORT
	select MIPS_SPRAM
	select MIPS_SPRAM


config EVA
config EVA
@@ -2502,6 +2503,9 @@ config MIPS_ASID_BITS
config MIPS_ASID_BITS_VARIABLE
config MIPS_ASID_BITS_VARIABLE
	bool
	bool


config MIPS_CRC_SUPPORT
	bool

#
#
# - Highmem only makes sense for the 32-bit kernel.
# - Highmem only makes sense for the 32-bit kernel.
# - The current highmem code will only work properly on physically indexed
# - The current highmem code will only work properly on physically indexed
@@ -2850,8 +2854,7 @@ config CRASH_DUMP


config PHYSICAL_START
config PHYSICAL_START
	hex "Physical address where the kernel is loaded"
	hex "Physical address where the kernel is loaded"
	default "0xffffffff84000000" if 64BIT
	default "0xffffffff84000000"
	default "0x84000000" if 32BIT
	depends on CRASH_DUMP
	depends on CRASH_DUMP
	help
	help
	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
+41 −23
Original line number Original line Diff line number Diff line
@@ -222,6 +222,8 @@ xpa-cflags-y := $(mips-cflags)
xpa-cflags-$(micromips-ase)		+= -mmicromips -Wa$(comma)-fatal-warnings
xpa-cflags-$(micromips-ase)		+= -mmicromips -Wa$(comma)-fatal-warnings
toolchain-xpa				:= $(call cc-option-yn,$(xpa-cflags-y) -mxpa)
toolchain-xpa				:= $(call cc-option-yn,$(xpa-cflags-y) -mxpa)
cflags-$(toolchain-xpa)			+= -DTOOLCHAIN_SUPPORTS_XPA
cflags-$(toolchain-xpa)			+= -DTOOLCHAIN_SUPPORTS_XPA
toolchain-crc				:= $(call cc-option-yn,$(mips-cflags) -Wa$(comma)-mcrc)
cflags-$(toolchain-crc)			+= -DTOOLCHAIN_SUPPORTS_CRC


#
#
# Firmware support
# Firmware support
@@ -249,20 +251,12 @@ ifdef CONFIG_PHYSICAL_START
load-y					= $(CONFIG_PHYSICAL_START)
load-y					= $(CONFIG_PHYSICAL_START)
endif
endif


entry-noisa-y				= 0x$(shell $(NM) vmlinux 2>/dev/null \
# Sign-extend the entry point to 64 bits if retrieved as a 32-bit number.
					| grep "\bkernel_entry\b" | cut -f1 -d \ )
entry-y		= $(shell $(OBJDUMP) -f vmlinux 2>/dev/null \
ifdef CONFIG_CPU_MICROMIPS
			| sed -n '/^start address / { \
  #
				s/^.* //; \
  # Set the ISA bit, since the kernel_entry symbol in the ELF will have it
				s/0x\([0-7].......\)$$/0x00000000\1/; \
  # clear which would lead to images containing addresses which bootloaders may
				s/0x\(........\)$$/0xffffffff\1/; p }')
  # jump to as MIPS32 code.
  #
  entry-y = $(patsubst %0,%1,$(patsubst %2,%3,$(patsubst %4,%5, \
              $(patsubst %6,%7,$(patsubst %8,%9,$(patsubst %a,%b, \
              $(patsubst %c,%d,$(patsubst %e,%f,$(entry-noisa-y)))))))))
else
  entry-y = $(entry-noisa-y)
endif


cflags-y			+= -I$(srctree)/arch/mips/include/asm/mach-generic
cflags-y			+= -I$(srctree)/arch/mips/include/asm/mach-generic
drivers-$(CONFIG_PCI)		+= arch/mips/pci/
drivers-$(CONFIG_PCI)		+= arch/mips/pci/
@@ -330,6 +324,7 @@ libs-y += arch/mips/math-emu/
# See arch/mips/Kbuild for content of core part of the kernel
# See arch/mips/Kbuild for content of core part of the kernel
core-y += arch/mips/
core-y += arch/mips/


drivers-$(CONFIG_MIPS_CRC_SUPPORT) += arch/mips/crypto/
drivers-$(CONFIG_OPROFILE)	+= arch/mips/oprofile/
drivers-$(CONFIG_OPROFILE)	+= arch/mips/oprofile/


# suspend and hibernation support
# suspend and hibernation support
@@ -473,6 +468,21 @@ define archhelp
	echo
	echo
	echo '  {micro32,32,64}{r1,r2,r6}{el,}_defconfig <BOARDS="list of boards">'
	echo '  {micro32,32,64}{r1,r2,r6}{el,}_defconfig <BOARDS="list of boards">'
	echo
	echo
	echo '  Where BOARDS is some subset of the following:'
	for board in $(sort $(BOARDS)); do echo "    $${board}"; done
	echo
	echo '  Specifically the following generic default configurations are'
	echo '  supported:'
	echo
	$(foreach cfg,$(generic_defconfigs),
	  printf "  %-24s - Build generic kernel for $(call describe_generic_defconfig,$(cfg))\n" $(cfg);)
	echo
	echo '  The following legacy default configurations have been converted to'
	echo '  generic and can still be used:'
	echo
	$(foreach cfg,$(sort $(legacy_defconfigs)),
	  printf "  %-24s - Build $($(cfg)-y)\n" $(cfg);)
	echo
	echo '  Otherwise, the following default configurations are available:'
	echo '  Otherwise, the following default configurations are available:'
endef
endef


@@ -507,6 +517,10 @@ endef
$(eval $(call gen_generic_defconfigs,32 64,r1 r2 r6,eb el))
$(eval $(call gen_generic_defconfigs,32 64,r1 r2 r6,eb el))
$(eval $(call gen_generic_defconfigs,micro32,r2,eb el))
$(eval $(call gen_generic_defconfigs,micro32,r2,eb el))


define describe_generic_defconfig
$(subst 32r,MIPS32 r,$(subst 64r,MIPS64 r,$(subst el, little endian,$(patsubst %_defconfig,%,$(1)))))
endef

.PHONY: $(generic_defconfigs)
.PHONY: $(generic_defconfigs)
$(generic_defconfigs):
$(generic_defconfigs):
	$(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh \
	$(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh \
@@ -543,14 +557,18 @@ generic_defconfig:
# now that the boards have been converted to use the generic kernel they are
# now that the boards have been converted to use the generic kernel they are
# wrappers around the generic rules above.
# wrappers around the generic rules above.
#
#
.PHONY: sead3_defconfig
legacy_defconfigs		+= ocelot_defconfig
sead3_defconfig:
ocelot_defconfig-y		:= 32r2el_defconfig BOARDS=ocelot
	$(Q)$(MAKE) -f $(srctree)/Makefile 32r2el_defconfig BOARDS=sead-3

legacy_defconfigs		+= sead3_defconfig
sead3_defconfig-y		:= 32r2el_defconfig BOARDS=sead-3

legacy_defconfigs		+= sead3micro_defconfig
sead3micro_defconfig-y		:= micro32r2el_defconfig BOARDS=sead-3


.PHONY: sead3micro_defconfig
legacy_defconfigs		+= xilfpga_defconfig
sead3micro_defconfig:
xilfpga_defconfig-y		:= 32r2el_defconfig BOARDS=xilfpga
	$(Q)$(MAKE) -f $(srctree)/Makefile micro32r2el_defconfig BOARDS=sead-3


.PHONY: xilfpga_defconfig
.PHONY: $(legacy_defconfigs)
xilfpga_defconfig:
$(legacy_defconfigs):
	$(Q)$(MAKE) -f $(srctree)/Makefile 32r2el_defconfig BOARDS=xilfpga
	$(Q)$(MAKE) -f $(srctree)/Makefile $($@-y)
Loading