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Commit 92826fcd authored by Maarten Lankhorst's avatar Maarten Lankhorst
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drm/i915: Calculate watermark related members in the crtc_state, v4. 



This removes pre/post_wm_update from intel_crtc->atomic, and
creates atomic state for it in intel_crtc.

Changes since v1:
- Rebase on top of wm changes.
Changes since v2:
- Split disable_cxsr into a separate patch.
Changes since v3:
- Move some of the changes to intel_wm_need_update.

Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/56603A49.5000507@linux.intel.com


Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent ab1d3a0e

drivers/gpu/drm/i915/intel_atomic.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -96,6 +96,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) 
	crtc_state->update_pipe = false;

	crtc_state->update_pipe = false;

	crtc_state->disable_lp_wm = false;

	crtc_state->disable_lp_wm = false;

	crtc_state->disable_cxsr = false;

	crtc_state->disable_cxsr = false;

	crtc_state->wm_changed = false;





	return &crtc_state->base;

	return &crtc_state->base;

}

}

drivers/gpu/drm/i915/intel_display.c

+19 −20
Original line number Original line Diff line number Diff line
@@ -4793,6 +4793,8 @@ intel_pre_disable_primary(struct drm_crtc *crtc) 
static void intel_post_plane_update(struct intel_crtc *crtc)

static void intel_post_plane_update(struct intel_crtc *crtc)

{

{

	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;

	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;

	struct intel_crtc_state *pipe_config =

		to_intel_crtc_state(crtc->base.state);

	struct drm_device *dev = crtc->base.dev;

	struct drm_device *dev = crtc->base.dev;





	if (atomic->wait_vblank)

	if (atomic->wait_vblank)
@@ -4802,7 +4804,7 @@ static void intel_post_plane_update(struct intel_crtc *crtc) 




	crtc->wm.cxsr_allowed = true;

	crtc->wm.cxsr_allowed = true;





	if (crtc->atomic.update_wm_post)

	if (pipe_config->wm_changed)

		intel_update_watermarks(&crtc->base);

		intel_update_watermarks(&crtc->base);





	if (atomic->update_fbc)

	if (atomic->update_fbc)
@@ -4835,6 +4837,9 @@ static void intel_pre_plane_update(struct intel_crtc *crtc) 
		crtc->wm.cxsr_allowed = false;

		crtc->wm.cxsr_allowed = false;

		intel_set_memory_cxsr(dev_priv, false);

		intel_set_memory_cxsr(dev_priv, false);

	}

	}



	if (!needs_modeset(&pipe_config->base) && pipe_config->wm_changed)

		intel_update_watermarks(&crtc->base);

}

}





static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask)

static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask)
@@ -11696,9 +11701,14 @@ static bool intel_wm_need_update(struct drm_plane *plane, 
	struct intel_plane_state *cur = to_intel_plane_state(plane->state);

	struct intel_plane_state *cur = to_intel_plane_state(plane->state);





	/* Update watermarks on tiling or size changes. */

	/* Update watermarks on tiling or size changes. */

	if (!plane->state->fb || !state->fb ||

	if (new->visible != cur->visible)

	    plane->state->fb->modifier[0] != state->fb->modifier[0] ||

		return true;

	    plane->state->rotation != state->rotation ||



	if (!cur->base.fb || !new->base.fb)

		return false;



	if (cur->base.fb->modifier[0] != new->base.fb->modifier[0] ||

	    cur->base.rotation != new->base.rotation ||

	    drm_rect_width(&new->src) != drm_rect_width(&cur->src) ||

	    drm_rect_width(&new->src) != drm_rect_width(&cur->src) ||

	    drm_rect_height(&new->src) != drm_rect_height(&cur->src) ||

	    drm_rect_height(&new->src) != drm_rect_height(&cur->src) ||

	    drm_rect_width(&new->dst) != drm_rect_width(&cur->dst) ||

	    drm_rect_width(&new->dst) != drm_rect_width(&cur->dst) ||
@@ -11768,17 +11778,9 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, 
			 plane->base.id, was_visible, visible,

			 plane->base.id, was_visible, visible,

			 turn_off, turn_on, mode_changed);

			 turn_off, turn_on, mode_changed);





	if (turn_on) {

	if (turn_on || turn_off) {

		intel_crtc->atomic.update_wm_pre = true;

		pipe_config->wm_changed = true;

		/* must disable cxsr around plane enable/disable */



		if (plane->type != DRM_PLANE_TYPE_CURSOR) {

			pipe_config->disable_cxsr = true;

			/* to potentially re-enable cxsr */

			intel_crtc->atomic.wait_vblank = true;

			intel_crtc->atomic.update_wm_post = true;

		}

	} else if (turn_off) {

		intel_crtc->atomic.update_wm_post = true;

		/* must disable cxsr around plane enable/disable */

		/* must disable cxsr around plane enable/disable */

		if (plane->type != DRM_PLANE_TYPE_CURSOR) {

		if (plane->type != DRM_PLANE_TYPE_CURSOR) {

			if (is_crtc_enabled)

			if (is_crtc_enabled)
@@ -11786,7 +11788,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, 
			pipe_config->disable_cxsr = true;

			pipe_config->disable_cxsr = true;

		}

		}

	} else if (intel_wm_need_update(plane, plane_state)) {

	} else if (intel_wm_need_update(plane, plane_state)) {

		intel_crtc->atomic.update_wm_pre = true;

		pipe_config->wm_changed = true;

	}

	}





	if (visible || was_visible)

	if (visible || was_visible)
@@ -11931,7 +11933,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc, 
	}

	}





	if (mode_changed && !crtc_state->active)

	if (mode_changed && !crtc_state->active)

		intel_crtc->atomic.update_wm_post = true;

		pipe_config->wm_changed = true;





	if (mode_changed && crtc_state->enable &&

	if (mode_changed && crtc_state->enable &&

	    dev_priv->display.crtc_compute_clock &&

	    dev_priv->display.crtc_compute_clock &&
@@ -13854,9 +13856,6 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc, 
		to_intel_crtc_state(old_crtc_state);

		to_intel_crtc_state(old_crtc_state);

	bool modeset = needs_modeset(crtc->state);

	bool modeset = needs_modeset(crtc->state);





	if (intel_crtc->atomic.update_wm_pre)

		intel_update_watermarks(crtc);



	/* Perform vblank evasion around commit operation */

	/* Perform vblank evasion around commit operation */

	intel_pipe_update_start(intel_crtc);

	intel_pipe_update_start(intel_crtc);

drivers/gpu/drm/i915/intel_drv.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -369,6 +369,7 @@ struct intel_crtc_state { 




	bool update_pipe; /* can a fast modeset be performed? */

	bool update_pipe; /* can a fast modeset be performed? */

	bool disable_cxsr;

	bool disable_cxsr;

	bool wm_changed; /* watermarks are updated */





	/* Pipe source size (ie. panel fitter input size)

	/* Pipe source size (ie. panel fitter input size)

	 * All planes will be positioned inside this space,

	 * All planes will be positioned inside this space,
@@ -535,7 +536,6 @@ struct intel_crtc_atomic_commit { 
	bool disable_fbc;

	bool disable_fbc;

	bool disable_ips;

	bool disable_ips;

	bool pre_disable_primary;

	bool pre_disable_primary;

	bool update_wm_pre, update_wm_post;





	/* Sleepable operations to perform after commit */

	/* Sleepable operations to perform after commit */

	unsigned fb_bits;

	unsigned fb_bits;