Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9201f63a authored by Odelu Kukatla's avatar Odelu Kukatla Committed by Gerrit - the friendly Code Review server
Browse files

clk: qcom: Add support for 162MHz for disp_cc_mdss_dp_link_clk for SM6150 



disp_cc_mdss_dp_link_clk clock requires to support 162MHz on SM6150,
so add support for the same.

Change-Id: Id57139f99dfca965bf2b92d1b63441225caca6e9
Signed-off-by: default avatarOdelu Kukatla <okukatla@codeaurora.org>
parent 76153cda

drivers/clk/qcom/dispcc-sm6150.c

+1 −0
Original line number Diff line number Diff line
@@ -256,6 +256,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { 
};



static const struct freq_tbl ftbl_disp_cc_mdss_dp_link_clk_src[] = {

	F( 162000, P_DP_PHY_PLL_LINK_CLK,   1,   0,   0),

	F( 270000, P_DP_PHY_PLL_LINK_CLK,   1,   0,   0),

	F( 540000, P_DP_PHY_PLL_LINK_CLK,   1,   0,   0),

	{ }