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Commit 90cad095 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Disable MI_STORE_DATA_IMM for i915g/i915gm 



The early gen3 machines (i915g/Grantsdale and i915gm/Alviso) share a lot
of characteristics in their MI/GTT blocks with gen2, and in particular
can only use physical addresses in MI_STORE_DATA_IMM. This makes it
incompatible with our usage, so include those two machines in the
blacklist to prevent usage.

v2: Make it easy for gcc and rewrite it as a switch to save some space.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20170906152859.5304-1-chris@chris-wilson.co.uk
parent 0db8c961

drivers/gpu/drm/i915/i915_drv.h

+0 −7
Original line number Diff line number Diff line
@@ -4360,11 +4360,4 @@ int remap_io_mapping(struct vm_area_struct *vma, 
		     unsigned long addr, unsigned long pfn, unsigned long size,

		     struct io_mapping *iomap);



static inline bool

intel_engine_can_store_dword(struct intel_engine_cs *engine)

{

	return __intel_engine_can_store_dword(INTEL_GEN(engine->i915),

					      engine->class);

}



#endif

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+4 −3
Original line number Diff line number Diff line
@@ -1168,6 +1168,9 @@ static u32 *reloc_gpu(struct i915_execbuffer *eb, 
		if (eb_use_cmdparser(eb))

			return ERR_PTR(-EWOULDBLOCK);



		if (!intel_engine_can_store_dword(eb->engine))

			return ERR_PTR(-ENODEV);



		err = __reloc_gpu_alloc(eb, vma, len);

		if (unlikely(err))

			return ERR_PTR(err);
@@ -1192,9 +1195,7 @@ relocate_entry(struct i915_vma *vma, 


	if (!eb->reloc_cache.vaddr &&

	    (DBG_FORCE_RELOC == FORCE_GPU_RELOC ||

	     !reservation_object_test_signaled_rcu(vma->resv, true)) &&

	    __intel_engine_can_store_dword(eb->reloc_cache.gen,

					   eb->engine->class)) {

	     !reservation_object_test_signaled_rcu(vma->resv, true))) {

		const unsigned int gen = eb->reloc_cache.gen;

		unsigned int len;

		u32 *batch;

drivers/gpu/drm/i915/intel_engine_cs.c

+15 −0
Original line number Diff line number Diff line
@@ -1378,6 +1378,21 @@ void intel_engines_mark_idle(struct drm_i915_private *i915) 
	}

}



bool intel_engine_can_store_dword(struct intel_engine_cs *engine)

{

	switch (INTEL_GEN(engine->i915)) {

	case 2:

		return false; /* uses physical not virtual addresses */

	case 3:

		/* maybe only uses physical not virtual addresses */

		return !(IS_I915G(engine->i915) || IS_I915GM(engine->i915));

	case 6:

		return engine->class != VIDEO_DECODE_CLASS; /* b0rked */

	default:

		return true;

	}

}



#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)

#include "selftests/mock_engine.c"

#endif

drivers/gpu/drm/i915/intel_ringbuffer.h

+1 −11
Original line number Diff line number Diff line
@@ -735,16 +735,6 @@ bool intel_engines_are_idle(struct drm_i915_private *dev_priv); 
void intel_engines_mark_idle(struct drm_i915_private *i915);

void intel_engines_reset_default_submission(struct drm_i915_private *i915);



static inline bool

__intel_engine_can_store_dword(unsigned int gen, unsigned int class)

{

	if (gen <= 2)

		return false; /* uses physical not virtual addresses */



	if (gen == 6 && class == VIDEO_DECODE_CLASS)

		return false; /* b0rked */



	return true;

}

bool intel_engine_can_store_dword(struct intel_engine_cs *engine);



#endif /* _INTEL_RINGBUFFER_H_ */