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Commit 8fba9e69 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: support GPU max freq @700Mhz only for v2"

parents 88219ec1 3d62b087

arch/arm64/boot/dts/qcom/sa8155-v2.dtsi

+101 −0
Original line number Diff line number Diff line
@@ -26,3 +26,104 @@ 
&ufsphy_mem {

	vdda-phy-supply = <&pm8150_1_l5>;

};



/* GPU frequency overrides */

&soc {

	gpu_opp_table_v2: gpu_opp_table_v2 {

		compatible = "operating-points-v2";



		opp-700000000 {

			opp-hz = /bits/ 64 <700000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO>;

		};



		opp-675000000 {

			opp-hz = /bits/ 64 <675000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM_L1>;

		};



		opp-585000000 {

			opp-hz = /bits/ 64 <585000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;

		};



		opp-427000000 {

			opp-hz = /bits/ 64 <427000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>;

		};



		opp-345000000 {

			opp-hz = /bits/ 64 <345000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>;

		};



		opp-257000000 {

			opp-hz = /bits/ 64 <257000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>;

		};



	};

};



/* GPU power level overrides */

&msm_gpu {

	qcom,gpu-pwrlevels {

		compatible = "qcom,gpu-pwrlevels";



		qcom,gpu-pwrlevel@0 {

			reg = <0>;

			qcom,gpu-freq = <700000000>;

			qcom,bus-freq = <10>;

			qcom,bus-min = <8>;

			qcom,bus-max = <11>;

		};



		qcom,gpu-pwrlevel@1 {

			reg = <1>;

			qcom,gpu-freq = <675000000>;

			qcom,bus-freq = <8>;

			qcom,bus-min = <7>;

			qcom,bus-max = <9>;

		};



		qcom,gpu-pwrlevel@2 {

			reg = <2>;

			qcom,gpu-freq = <585000000>;

			qcom,bus-freq = <7>;

			qcom,bus-min = <6>;

			qcom,bus-max = <11>;

		};



		qcom,gpu-pwrlevel@3 {

			reg = <3>;

			qcom,gpu-freq = <427000000>;

			qcom,bus-freq = <6>;

			qcom,bus-min = <5>;

			qcom,bus-max = <9>;

		};



		qcom,gpu-pwrlevel@4 {

			reg = <4>;

			qcom,gpu-freq = <345000000>;

			qcom,bus-freq = <3>;

			qcom,bus-min = <3>;

			qcom,bus-max = <8>;

		};



		qcom,gpu-pwrlevel@5 {

			reg = <5>;

			qcom,gpu-freq = <257000000>;

			qcom,bus-freq = <2>;

			qcom,bus-min = <1>;

			qcom,bus-max = <8>;

		};



		qcom,gpu-pwrlevel@6 {

			reg = <6>;

			qcom,gpu-freq = <0>;

			qcom,bus-freq = <0>;

			qcom,bus-min = <0>;

			qcom,bus-max = <0>;

		};

	};

};

arch/arm64/boot/dts/qcom/sa8155.dtsi

+0 −101
Original line number Diff line number Diff line
@@ -753,104 +753,3 @@ 
};



#include "sa8155-audio.dtsi"
 


/* GPU frequency overrides */

&soc {

	gpu_opp_table_v2: gpu_opp_table_v2 {

		compatible = "operating-points-v2";



		opp-700000000 {

			opp-hz = /bits/ 64 <700000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO>;

		};



		opp-675000000 {

			opp-hz = /bits/ 64 <675000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM_L1>;

		};



		opp-585000000 {

			opp-hz = /bits/ 64 <585000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;

		};



		opp-427000000 {

			opp-hz = /bits/ 64 <427000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>;

		};



		opp-345000000 {

			opp-hz = /bits/ 64 <345000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>;

		};



		opp-257000000 {

			opp-hz = /bits/ 64 <257000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>;

		};



	};

};



/* GPU power level overrides */

&msm_gpu {

	qcom,gpu-pwrlevels {

		compatible = "qcom,gpu-pwrlevels";



		qcom,gpu-pwrlevel@0 {

			reg = <0>;

			qcom,gpu-freq = <700000000>;

			qcom,bus-freq = <10>;

			qcom,bus-min = <8>;

			qcom,bus-max = <11>;

		};



		qcom,gpu-pwrlevel@1 {

			reg = <1>;

			qcom,gpu-freq = <675000000>;

			qcom,bus-freq = <8>;

			qcom,bus-min = <7>;

			qcom,bus-max = <9>;

		};



		qcom,gpu-pwrlevel@2 {

			reg = <2>;

			qcom,gpu-freq = <585000000>;

			qcom,bus-freq = <7>;

			qcom,bus-min = <6>;

			qcom,bus-max = <11>;

		};



		qcom,gpu-pwrlevel@3 {

			reg = <3>;

			qcom,gpu-freq = <427000000>;

			qcom,bus-freq = <6>;

			qcom,bus-min = <5>;

			qcom,bus-max = <9>;

		};



		qcom,gpu-pwrlevel@4 {

			reg = <4>;

			qcom,gpu-freq = <345000000>;

			qcom,bus-freq = <3>;

			qcom,bus-min = <3>;

			qcom,bus-max = <8>;

		};



		qcom,gpu-pwrlevel@5 {

			reg = <5>;

			qcom,gpu-freq = <257000000>;

			qcom,bus-freq = <2>;

			qcom,bus-min = <1>;

			qcom,bus-max = <8>;

		};



		qcom,gpu-pwrlevel@6 {

			reg = <6>;

			qcom,gpu-freq = <0>;

			qcom,bus-freq = <0>;

			qcom,bus-min = <0>;

			qcom,bus-max = <0>;

		};

	};

};