Loading drivers/power/supply/qcom/fg-alg.h +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ struct cl_params { int min_cap_limit; int skew_decipct; int min_delta_batt_soc; int ibat_flt_thr_ma; bool cl_wt_enable; }; Loading drivers/power/supply/qcom/fg-core.h +3 −0 Original line number Diff line number Diff line Loading @@ -172,6 +172,7 @@ enum fg_sram_param_id { FG_SRAM_VBAT_TAU, FG_SRAM_VBAT_FINAL, FG_SRAM_IBAT_FINAL, FG_SRAM_IBAT_FLT, FG_SRAM_ESR, FG_SRAM_ESR_MDL, FG_SRAM_ESR_ACT, Loading Loading @@ -499,6 +500,8 @@ extern int fg_decode_voltage_15b(struct fg_sram_param *sp, enum fg_sram_param_id id, int val); extern int fg_decode_current_16b(struct fg_sram_param *sp, enum fg_sram_param_id id, int val); extern int fg_decode_current_24b(struct fg_sram_param *sp, enum fg_sram_param_id id, int val); extern int fg_decode_cc_soc(struct fg_sram_param *sp, enum fg_sram_param_id id, int value); extern int fg_decode_value_16b(struct fg_sram_param *sp, Loading drivers/power/supply/qcom/fg-util.c +17 −0 Original line number Diff line number Diff line Loading @@ -47,6 +47,23 @@ int fg_decode_voltage_15b(struct fg_sram_param *sp, return sp[id].value; } #define CURRENT_24BIT_MSB_MASK GENMASK(27, 16) #define CURRENT_24BIT_LSB_MASK GENMASK(11, 0) int fg_decode_current_24b(struct fg_sram_param *sp, enum fg_sram_param_id id, int value) { int msb, lsb, val; msb = value & CURRENT_24BIT_MSB_MASK; lsb = value & CURRENT_24BIT_LSB_MASK; val = (msb >> 4) | lsb; val = sign_extend32(val, 23); sp[id].value = div_s64((s64)val * sp[id].denmtr, sp[id].numrtr); pr_debug("id: %d raw value: %x decoded value: %x\n", id, value, sp[id].value); return sp[id].value; } int fg_decode_current_16b(struct fg_sram_param *sp, enum fg_sram_param_id id, int value) { Loading drivers/power/supply/qcom/qpnp-fg-gen4.c +46 −0 Original line number Diff line number Diff line Loading @@ -180,6 +180,8 @@ #define RSLOW_SCALE_FN_CHG_V2_OFFSET 0 #define ACT_BATT_CAP_v2_WORD 287 #define ACT_BATT_CAP_v2_OFFSET 0 #define IBAT_FLT_WORD 322 #define IBAT_FLT_OFFSET 0 #define VBAT_FLT_WORD 326 #define VBAT_FLT_OFFSET 0 #define RSLOW_v2_WORD 371 Loading Loading @@ -490,6 +492,8 @@ static struct fg_sram_param pm8150b_v2_sram_params[] = { 0, NULL, fg_decode_voltage_15b), PARAM(IBAT_FINAL, IBAT_FINAL_WORD, IBAT_FINAL_OFFSET, 2, 1000, 488282, 0, NULL, fg_decode_current_16b), PARAM(IBAT_FLT, IBAT_FLT_WORD, IBAT_FLT_OFFSET, 4, 10000, 19073, 0, NULL, fg_decode_current_24b), PARAM(ESR, ESR_WORD, ESR_OFFSET, 2, 1000, 244141, 0, fg_encode_default, fg_decode_value_16b), PARAM(ESR_MDL, ESR_MDL_WORD, ESR_MDL_OFFSET, 2, 1000, 244141, 0, Loading Loading @@ -1351,6 +1355,39 @@ static int fg_gen4_prime_cc_soc_sw(void *data, u32 batt_soc) return rc; } static bool fg_gen4_cl_ok_to_begin(void *data) { struct fg_gen4_chip *chip = data; struct fg_dev *fg; int rc, val = 0; if (!chip) return false; fg = &chip->fg; if (chip->cl->dt.ibat_flt_thr_ma <= 0) return true; rc = fg_get_sram_prop(fg, FG_SRAM_IBAT_FLT, &val); if (rc < 0) { pr_err("Failed to get filtered battery current, rc = %d\n", rc); return true; } /* convert to milli-units */ val = DIV_ROUND_CLOSEST(val, 1000); pr_debug("IBAT_FLT thr: %d val: %d\n", chip->cl->dt.ibat_flt_thr_ma, val); if (abs(val) > chip->cl->dt.ibat_flt_thr_ma) return false; return true; } static int fg_gen4_get_cc_soc_sw(void *data, int *cc_soc_sw) { struct fg_gen4_chip *chip = data; Loading Loading @@ -4436,6 +4473,9 @@ static int fg_psy_get_property(struct power_supply *psy, case POWER_SUPPLY_PROP_CURRENT_NOW: rc = fg_get_battery_current(fg, &pval->intval); break; case POWER_SUPPLY_PROP_CURRENT_AVG: rc = fg_get_sram_prop(fg, FG_SRAM_IBAT_FLT, &pval->intval); break; case POWER_SUPPLY_PROP_TEMP: rc = fg_gen4_get_battery_temp(fg, &pval->intval); break; Loading Loading @@ -4675,6 +4715,7 @@ static enum power_supply_property fg_psy_props[] = { POWER_SUPPLY_PROP_VOLTAGE_OCV, POWER_SUPPLY_PROP_VOLTAGE_AVG, POWER_SUPPLY_PROP_CURRENT_NOW, POWER_SUPPLY_PROP_CURRENT_AVG, POWER_SUPPLY_PROP_RESISTANCE_ID, POWER_SUPPLY_PROP_RESISTANCE, POWER_SUPPLY_PROP_ESR_ACTUAL, Loading Loading @@ -4926,6 +4967,7 @@ static int fg_alg_init(struct fg_gen4_chip *chip) cl->prime_cc_soc = fg_gen4_prime_cc_soc_sw; cl->get_learned_capacity = fg_gen4_get_learned_capacity; cl->store_learned_capacity = fg_gen4_store_learned_capacity; cl->ok_to_begin = fg_gen4_cl_ok_to_begin; cl->data = chip; rc = cap_learning_init(cl); Loading Loading @@ -5773,6 +5815,10 @@ static void fg_gen4_parse_cl_params_dt(struct fg_gen4_chip *chip) chip->cl->dt.max_start_soc = -EINVAL; chip->cl->dt.min_start_soc = -EINVAL; } chip->cl->dt.ibat_flt_thr_ma = 100; of_property_read_u32(node, "qcom,cl-ibat-flt-thresh-ma", &chip->cl->dt.ibat_flt_thr_ma); } static int fg_gen4_parse_revid_dt(struct fg_gen4_chip *chip) Loading Loading
drivers/power/supply/qcom/fg-alg.h +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ struct cl_params { int min_cap_limit; int skew_decipct; int min_delta_batt_soc; int ibat_flt_thr_ma; bool cl_wt_enable; }; Loading
drivers/power/supply/qcom/fg-core.h +3 −0 Original line number Diff line number Diff line Loading @@ -172,6 +172,7 @@ enum fg_sram_param_id { FG_SRAM_VBAT_TAU, FG_SRAM_VBAT_FINAL, FG_SRAM_IBAT_FINAL, FG_SRAM_IBAT_FLT, FG_SRAM_ESR, FG_SRAM_ESR_MDL, FG_SRAM_ESR_ACT, Loading Loading @@ -499,6 +500,8 @@ extern int fg_decode_voltage_15b(struct fg_sram_param *sp, enum fg_sram_param_id id, int val); extern int fg_decode_current_16b(struct fg_sram_param *sp, enum fg_sram_param_id id, int val); extern int fg_decode_current_24b(struct fg_sram_param *sp, enum fg_sram_param_id id, int val); extern int fg_decode_cc_soc(struct fg_sram_param *sp, enum fg_sram_param_id id, int value); extern int fg_decode_value_16b(struct fg_sram_param *sp, Loading
drivers/power/supply/qcom/fg-util.c +17 −0 Original line number Diff line number Diff line Loading @@ -47,6 +47,23 @@ int fg_decode_voltage_15b(struct fg_sram_param *sp, return sp[id].value; } #define CURRENT_24BIT_MSB_MASK GENMASK(27, 16) #define CURRENT_24BIT_LSB_MASK GENMASK(11, 0) int fg_decode_current_24b(struct fg_sram_param *sp, enum fg_sram_param_id id, int value) { int msb, lsb, val; msb = value & CURRENT_24BIT_MSB_MASK; lsb = value & CURRENT_24BIT_LSB_MASK; val = (msb >> 4) | lsb; val = sign_extend32(val, 23); sp[id].value = div_s64((s64)val * sp[id].denmtr, sp[id].numrtr); pr_debug("id: %d raw value: %x decoded value: %x\n", id, value, sp[id].value); return sp[id].value; } int fg_decode_current_16b(struct fg_sram_param *sp, enum fg_sram_param_id id, int value) { Loading
drivers/power/supply/qcom/qpnp-fg-gen4.c +46 −0 Original line number Diff line number Diff line Loading @@ -180,6 +180,8 @@ #define RSLOW_SCALE_FN_CHG_V2_OFFSET 0 #define ACT_BATT_CAP_v2_WORD 287 #define ACT_BATT_CAP_v2_OFFSET 0 #define IBAT_FLT_WORD 322 #define IBAT_FLT_OFFSET 0 #define VBAT_FLT_WORD 326 #define VBAT_FLT_OFFSET 0 #define RSLOW_v2_WORD 371 Loading Loading @@ -490,6 +492,8 @@ static struct fg_sram_param pm8150b_v2_sram_params[] = { 0, NULL, fg_decode_voltage_15b), PARAM(IBAT_FINAL, IBAT_FINAL_WORD, IBAT_FINAL_OFFSET, 2, 1000, 488282, 0, NULL, fg_decode_current_16b), PARAM(IBAT_FLT, IBAT_FLT_WORD, IBAT_FLT_OFFSET, 4, 10000, 19073, 0, NULL, fg_decode_current_24b), PARAM(ESR, ESR_WORD, ESR_OFFSET, 2, 1000, 244141, 0, fg_encode_default, fg_decode_value_16b), PARAM(ESR_MDL, ESR_MDL_WORD, ESR_MDL_OFFSET, 2, 1000, 244141, 0, Loading Loading @@ -1351,6 +1355,39 @@ static int fg_gen4_prime_cc_soc_sw(void *data, u32 batt_soc) return rc; } static bool fg_gen4_cl_ok_to_begin(void *data) { struct fg_gen4_chip *chip = data; struct fg_dev *fg; int rc, val = 0; if (!chip) return false; fg = &chip->fg; if (chip->cl->dt.ibat_flt_thr_ma <= 0) return true; rc = fg_get_sram_prop(fg, FG_SRAM_IBAT_FLT, &val); if (rc < 0) { pr_err("Failed to get filtered battery current, rc = %d\n", rc); return true; } /* convert to milli-units */ val = DIV_ROUND_CLOSEST(val, 1000); pr_debug("IBAT_FLT thr: %d val: %d\n", chip->cl->dt.ibat_flt_thr_ma, val); if (abs(val) > chip->cl->dt.ibat_flt_thr_ma) return false; return true; } static int fg_gen4_get_cc_soc_sw(void *data, int *cc_soc_sw) { struct fg_gen4_chip *chip = data; Loading Loading @@ -4436,6 +4473,9 @@ static int fg_psy_get_property(struct power_supply *psy, case POWER_SUPPLY_PROP_CURRENT_NOW: rc = fg_get_battery_current(fg, &pval->intval); break; case POWER_SUPPLY_PROP_CURRENT_AVG: rc = fg_get_sram_prop(fg, FG_SRAM_IBAT_FLT, &pval->intval); break; case POWER_SUPPLY_PROP_TEMP: rc = fg_gen4_get_battery_temp(fg, &pval->intval); break; Loading Loading @@ -4675,6 +4715,7 @@ static enum power_supply_property fg_psy_props[] = { POWER_SUPPLY_PROP_VOLTAGE_OCV, POWER_SUPPLY_PROP_VOLTAGE_AVG, POWER_SUPPLY_PROP_CURRENT_NOW, POWER_SUPPLY_PROP_CURRENT_AVG, POWER_SUPPLY_PROP_RESISTANCE_ID, POWER_SUPPLY_PROP_RESISTANCE, POWER_SUPPLY_PROP_ESR_ACTUAL, Loading Loading @@ -4926,6 +4967,7 @@ static int fg_alg_init(struct fg_gen4_chip *chip) cl->prime_cc_soc = fg_gen4_prime_cc_soc_sw; cl->get_learned_capacity = fg_gen4_get_learned_capacity; cl->store_learned_capacity = fg_gen4_store_learned_capacity; cl->ok_to_begin = fg_gen4_cl_ok_to_begin; cl->data = chip; rc = cap_learning_init(cl); Loading Loading @@ -5773,6 +5815,10 @@ static void fg_gen4_parse_cl_params_dt(struct fg_gen4_chip *chip) chip->cl->dt.max_start_soc = -EINVAL; chip->cl->dt.min_start_soc = -EINVAL; } chip->cl->dt.ibat_flt_thr_ma = 100; of_property_read_u32(node, "qcom,cl-ibat-flt-thresh-ma", &chip->cl->dt.ibat_flt_thr_ma); } static int fg_gen4_parse_revid_dt(struct fg_gen4_chip *chip) Loading