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Commit 8f491429 authored by Abhijit Kulkarni's avatar Abhijit Kulkarni Committed by Gerrit - the friendly Code Review server
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Revert "ARM: dts: msm: enable display rsc for sm8150" 



This reverts commit 1dbd9790.

Change-Id: If7c8ca1753cb7d7b950ae7b6d40b03b268c36dda
Signed-off-by: default avatarAbhijit Kulkarni <kabhijit@codeaurora.org>
parent e00d2a35

arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -395,7 +395,7 @@ 
};



&mdss_mdp {

	connectors = <&sde_rscc &sde_wb &sde_dp &sde_dsi>;

	connectors = <&sde_wb &sde_dp &sde_dsi>;

};



/* PHY TIMINGS REVISION P */

arch/arm64/boot/dts/qcom/sm8150-sde-pll.dtsi

+17 −0
Original line number Diff line number Diff line
@@ -79,6 +79,8 @@ 
		reg-names = "pll_base", "phy_base", "ln_tx0_base",

			"ln_tx1_base", "gdsc_base";



		gdsc-supply = <&mdss_core_gdsc>;



		clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>,

			 <&clock_rpmh RPMH_CXO_CLK>,

			 <&clock_gcc GCC_DISP_AHB_CLK>,
@@ -87,6 +89,21 @@ 
		clock-names = "iface_clk", "ref_clk_src", "gcc_iface",

			"ref_clk", "pipe_clk";

		clock-rate = <0>;



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};



		};

	};



};

arch/arm64/boot/dts/qcom/sm8150-sde.dtsi

+21 −10
Original line number Diff line number Diff line
@@ -24,19 +24,15 @@ 
		clocks =

			<&clock_gcc GCC_DISP_AHB_CLK>,

			<&clock_gcc GCC_DISP_HF_AXI_CLK>,

			<&clock_gcc GCC_DISP_SF_AXI_CLK>,

			<&clock_dispcc DISP_CC_MDSS_AHB_CLK>,

			<&clock_dispcc DISP_CC_MDSS_MDP_CLK>,

			<&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>,

			<&clock_dispcc DISP_CC_MDSS_ROT_CLK>;

		clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus",

				"iface_clk", "core_clk", "vsync_clk",

				"rot_clk";

		clock-rate = <0 0 0 0 300000000 19200000 0>;

		clock-max-rate = <0 0 0 0 460000000 19200000 0>;

			<&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>;

		clock-names = "gcc_iface", "gcc_bus",

				"iface_clk", "core_clk", "vsync_clk";

		clock-rate = <0 0 0 300000000 19200000>;

		clock-max-rate = <0 0 0 460000000 19200000>;



		sde-vdd-supply = <&mdss_core_gdsc>;

		mmcx-supply = <&VDD_MMCX_LEVEL>;



		/* interrupt config */

		interrupts = <0 83 0>;
@@ -248,7 +244,7 @@ 


			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "mmcx";

				qcom,supply-name = "sde-vdd";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;
@@ -291,6 +287,7 @@ 
			<0xaf30000 0x3fd4>;

		reg-names = "drv", "wrapper";

		qcom,sde-rsc-version = <2>;

		status = "disabled";



		vdd-supply = <&mdss_core_gdsc>;

		clocks = <&clock_dispcc DISP_CC_MDSS_RSCC_VSYNC_CLK>,
@@ -337,6 +334,20 @@ 
			    <20000 20512 0 6400000>,

			    <20000 20512 0 6400000>;

		};



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "mmcx";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};

	};



	mdss_rotator: qcom,mdss_rotator@ae00000 {