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Commit 8f092ac3 authored by Jayadev K's avatar Jayadev K
Browse files

ARM: dts: qcom: Adding I2S parameters to HS-I2S node on SA8155-VM 



Adding the below properties to HS-I2S generic node
1. number-of-rate-detectors
2. rate-detector-interfaces

Adding the below properties to HS-I2S interface node
1. bit-clock-hz
2. data-buffer-ms
3. bit-depth
4. spkr-channel-count
5. mic-channel-count.

Change-Id: I7b10ce28d3b7c8661cd0069faee7e77bbfd5156f
Signed-off-by: default avatarJayadev K <jayak@codeaurora.org>
parent c30cd30a

arch/arm64/boot/dts/qcom/sa8155-vm.dtsi

+17 −2
Original line number Diff line number Diff line
@@ -38,8 +38,8 @@ 
		      <0x17080000 0xE000>;

		reg-names = "lpa_if", "lpass_tcsr";

		interrupts = <GIC_SPI 267 0>;

		bit-clock-hz = <20000000>;

		interrupt-interval-ms = <10>;

		number-of-rate-detectors = <2>;

		rate-detector-interfaces = <0 1>;



		sdr0: qcom,hs0_i2s {

			compatible = "qcom,hsi2s-interface";
@@ -51,6 +51,11 @@ 
			pinctrl-1 = <&hs1_i2s_mclk_sleep &hs1_i2s_sck_sleep

				     &hs1_i2s_ws_sleep &hs1_i2s_data0_sleep

				     &hs1_i2s_data1_sleep>;

			bit-clock-hz = <12288000>;

			data-buffer-ms = <10>;

			bit-depth = <32>;

			spkr-channel-count = <2>;

			mic-channel-count = <2>;

		};



		sdr1: qcom,hs1_i2s {
@@ -63,6 +68,11 @@ 
			pinctrl-1 = <&hs2_i2s_mclk_sleep &hs2_i2s_sck_sleep

				     &hs2_i2s_ws_sleep &hs2_i2s_data0_sleep

				     &hs2_i2s_data1_sleep>;

			bit-clock-hz = <12288000>;

			data-buffer-ms = <10>;

			bit-depth = <32>;

			spkr-channel-count = <2>;

			mic-channel-count = <2>;

		};



		sdr2: qcom,hs2_i2s {
@@ -75,6 +85,11 @@ 
			pinctrl-1 = <&hs3_i2s_mclk_sleep &hs3_i2s_sck_sleep

				     &hs3_i2s_ws_sleep &hs3_i2s_data0_sleep

				     &hs3_i2s_data1_sleep>;

			bit-clock-hz = <12288000>;

			data-buffer-ms = <10>;

			bit-depth = <32>;

			spkr-channel-count = <2>;

			mic-channel-count = <2>;

		};

	};