Loading arch/arm64/boot/dts/qcom/atoll-npu.dtsi +15 −15 Original line number Diff line number Diff line Loading @@ -78,15 +78,15 @@ vreg = <1>; clk-freq = <19200000 100000000 200000000 200000000 192000000 192000000 150000000 30000000 200000000 19200000 50000000 19200000 200000000 192000000 19200000 300000000>; }; Loading @@ -96,15 +96,15 @@ vreg = <2>; clk-freq = <19200000 200000000 400000000 400000000 268800000 268800000 200000000 37500000 300000000 19200000 50000000 19200000 400000000 268800000 19200000 400000000>; }; Loading @@ -114,15 +114,15 @@ vreg = <3>; clk-freq = <19200000 333000000 515000000 515000000 403200000 403200000 300000000 37500000 403000000 19200000 50000000 19200000 515000000 403200000 19200000 500000000>; }; Loading @@ -132,15 +132,15 @@ vreg = <4>; clk-freq = <19200000 428000000 650000000 650000000 515000000 515000000 403000000 75000000 600000000 19200000 100000000 19200000 650000000 515000000 19200000 660000000>; }; Loading @@ -150,15 +150,15 @@ vreg = <6>; clk-freq = <19200000 500000000 800000000 800000000 748800000 748800000 533000000 75000000 710000000 19200000 100000000 19200000 800000000 748800000 19200000 800000000>; }; Loading Loading
arch/arm64/boot/dts/qcom/atoll-npu.dtsi +15 −15 Original line number Diff line number Diff line Loading @@ -78,15 +78,15 @@ vreg = <1>; clk-freq = <19200000 100000000 200000000 200000000 192000000 192000000 150000000 30000000 200000000 19200000 50000000 19200000 200000000 192000000 19200000 300000000>; }; Loading @@ -96,15 +96,15 @@ vreg = <2>; clk-freq = <19200000 200000000 400000000 400000000 268800000 268800000 200000000 37500000 300000000 19200000 50000000 19200000 400000000 268800000 19200000 400000000>; }; Loading @@ -114,15 +114,15 @@ vreg = <3>; clk-freq = <19200000 333000000 515000000 515000000 403200000 403200000 300000000 37500000 403000000 19200000 50000000 19200000 515000000 403200000 19200000 500000000>; }; Loading @@ -132,15 +132,15 @@ vreg = <4>; clk-freq = <19200000 428000000 650000000 650000000 515000000 515000000 403000000 75000000 600000000 19200000 100000000 19200000 650000000 515000000 19200000 660000000>; }; Loading @@ -150,15 +150,15 @@ vreg = <6>; clk-freq = <19200000 500000000 800000000 800000000 748800000 748800000 533000000 75000000 710000000 19200000 100000000 19200000 800000000 748800000 19200000 800000000>; }; Loading