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Commit 8e1ce6c6 authored by Milo Kim's avatar Milo Kim Committed by Maxime Ripard
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ARM: dts: sun8i: Add SPI controller node in H3 



H3 SPI subsystem is almost same as A31 SPI except buffer size, so those
DT properties are reusable.

Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMilo Kim <woogyom.kim@gmail.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent eeeb2d64

arch/arm/boot/dts/sun8i-h3.dtsi

+32 −0
Original line number Diff line number Diff line
@@ -439,6 +439,38 @@ 
			clocks = <&osc24M>;

		};



		spi0: spi@01c68000 {

			compatible = "allwinner,sun8i-h3-spi";

			reg = <0x01c68000 0x1000>;

			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;

			clock-names = "ahb", "mod";

			dmas = <&dma 23>, <&dma 23>;

			dma-names = "rx", "tx";

			pinctrl-names = "default";

			pinctrl-0 = <&spi0_pins>;

			resets = <&ccu RST_BUS_SPI0>;

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;

		};



		spi1: spi@01c69000 {

			compatible = "allwinner,sun8i-h3-spi";

			reg = <0x01c69000 0x1000>;

			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;

			clock-names = "ahb", "mod";

			dmas = <&dma 24>, <&dma 24>;

			dma-names = "rx", "tx";

			pinctrl-names = "default";

			pinctrl-0 = <&spi1_pins>;

			resets = <&ccu RST_BUS_SPI1>;

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;

		};



		wdt0: watchdog@01c20ca0 {

			compatible = "allwinner,sun6i-a31-wdt";

			reg = <0x01c20ca0 0x20>;