Loading arch/arm64/boot/dts/qcom/msm-arm-smmu-sdm855.dtsi +132 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,10 @@ qcom,use-3-lvl-tables; qcom,no-asid-retention; #global-interrupts = <1>; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clock-names = "gcc_gpu_memnoc_gfx_clk"; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>; #size-cells = <1>; #address-cells = <1>; ranges; Loading Loading @@ -148,6 +152,17 @@ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; anoc_1_tbu: anoc_1_tbu@0x15185000 { compatible = "qcom,qsmmuv500-tbu"; Loading @@ -155,6 +170,19 @@ <0x15182200 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x0 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu1_gdsc>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; anoc_2_tbu: anoc_2_tbu@0x15189000 { Loading @@ -163,6 +191,19 @@ <0x15182208 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x400 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu2_gdsc>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; mnoc_hf_0_tbu: mnoc_hf_0_tbu@0x1518D000 { Loading @@ -171,6 +212,19 @@ <0x15182210 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x800 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>; qcom,msm-bus,name = "mnoc_hf_0_tbu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 1000>; }; mnoc_hf_1_tbu: mnoc_hf_1_tbu@0x15191000 { Loading @@ -179,6 +233,19 @@ <0x15182218 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0xc00 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>; qcom,msm-bus,name = "mnoc_hf_1_tbu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 1000>; }; mnoc_sf_0_tbu: mnoc_sf_0_tbu@0x15195000 { Loading @@ -187,6 +254,19 @@ <0x15182220 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1000 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf_gdsc>; qcom,msm-bus,name = "mnoc_sf_0_tbu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_CAMNOC_SF>, <MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_CAMNOC_SF>, <MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>, <0 1000>; }; compute_dsp_0_tbu: compute_dsp_0_tbu@0x15199000 { Loading @@ -195,6 +275,18 @@ <0x15182228 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1400 0x400>; /* No GDSC */ qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 1000>; }; adsp_tbu: adsp_tbu@0x1519D000 { Loading @@ -203,6 +295,19 @@ <0x15182230 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1800 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; anoc_1_pcie_tbu: anoc_1_pcie_tbu@0x151A1000 { Loading @@ -211,6 +316,21 @@ <0x15182238 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1c00 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc>; clock-names = "gcc_aggre_noc_pcie_tbu_clk"; clocks = <&clock_gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; compute_dsp_1_tbu: compute_dsp_1_tbu@0x151A5000 { Loading @@ -219,6 +339,18 @@ <0x15182240 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1c00 0x400>; /* No GDSC */ qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 1000>; }; }; Loading Loading
arch/arm64/boot/dts/qcom/msm-arm-smmu-sdm855.dtsi +132 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,10 @@ qcom,use-3-lvl-tables; qcom,no-asid-retention; #global-interrupts = <1>; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clock-names = "gcc_gpu_memnoc_gfx_clk"; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>; #size-cells = <1>; #address-cells = <1>; ranges; Loading Loading @@ -148,6 +152,17 @@ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; anoc_1_tbu: anoc_1_tbu@0x15185000 { compatible = "qcom,qsmmuv500-tbu"; Loading @@ -155,6 +170,19 @@ <0x15182200 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x0 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu1_gdsc>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; anoc_2_tbu: anoc_2_tbu@0x15189000 { Loading @@ -163,6 +191,19 @@ <0x15182208 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x400 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu2_gdsc>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; mnoc_hf_0_tbu: mnoc_hf_0_tbu@0x1518D000 { Loading @@ -171,6 +212,19 @@ <0x15182210 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x800 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>; qcom,msm-bus,name = "mnoc_hf_0_tbu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 1000>; }; mnoc_hf_1_tbu: mnoc_hf_1_tbu@0x15191000 { Loading @@ -179,6 +233,19 @@ <0x15182218 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0xc00 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>; qcom,msm-bus,name = "mnoc_hf_1_tbu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_MDP_PORT0>, <MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>, <0 1000>; }; mnoc_sf_0_tbu: mnoc_sf_0_tbu@0x15195000 { Loading @@ -187,6 +254,19 @@ <0x15182220 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1000 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf_gdsc>; qcom,msm-bus,name = "mnoc_sf_0_tbu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_CAMNOC_SF>, <MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_CAMNOC_SF>, <MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>, <0 1000>; }; compute_dsp_0_tbu: compute_dsp_0_tbu@0x15199000 { Loading @@ -195,6 +275,18 @@ <0x15182228 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1400 0x400>; /* No GDSC */ qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 1000>; }; adsp_tbu: adsp_tbu@0x1519D000 { Loading @@ -203,6 +295,19 @@ <0x15182230 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1800 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; anoc_1_pcie_tbu: anoc_1_pcie_tbu@0x151A1000 { Loading @@ -211,6 +316,21 @@ <0x15182238 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1c00 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc>; clock-names = "gcc_aggre_noc_pcie_tbu_clk"; clocks = <&clock_gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 0>, <MSM_BUS_MASTER_GEM_NOC_SNOC>, <MSM_BUS_SLAVE_IMEM_CFG>, <0 1000>; }; compute_dsp_1_tbu: compute_dsp_1_tbu@0x151A5000 { Loading @@ -219,6 +339,18 @@ <0x15182240 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x1c00 0x400>; /* No GDSC */ qcom,msm-bus,name = "apps_smmu"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,active-only; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 0>, <MSM_BUS_MASTER_NPU>, <MSM_BUS_SLAVE_CDSP_MEM_NOC>, <0 1000>; }; }; Loading